{ "schema": "semiagora.2d-cfet-contact-parasitic-ppa-evidence-ladder.v1", "version": "2026-08-25-v101", "generated_date": "2026-08-25", "experiment_id": "SA-DEV-2D-CFET-PPA-003", "title": "2D CFET contact-to-parasitic-to-PPA evidence ladder", "execution_mode": "precomputed_browser_csv_replay_only", "summary": "An original deterministic packet that makes contact omission, layout-RC omission, extraction maturity, compact-model maturity, circuit context, contradiction state, and owned replacement evidence visible before any 2D CFET PPA claim.", "counts": { "rows": 6144, "transport_states": 2, "contact_hypotheses": 4, "parasitic_contexts": 4, "extraction_maturities": 4, "compact_model_maturities": 3, "circuit_contexts": 4, "supply_states": 2, "evidence_postures": 2, "taxonomy_nodes_covered": 4, "source_anchors": 9, "real_measurement_rows": 0, "copied_publication_results": 0, "proprietary_models_or_pdk_files": 0, "live_tcad_runs": 0, "live_spice_runs": 0, "live_pex_runs": 0, "architecture_or_node_rankings": 0, "ppa_signoff_actions": 0, "liveServerRuns": 0 }, "axes": { "transportStates": [ { "id": "balanced_np_transport_proxy", "label": "Balanced n/p transport proxy", "nChannelResistanceOhm": 420, "pChannelResistanceOhm": 500, "intrinsicCapacitanceFf": 0.45, "note": "Original symmetric teaching hypothesis; not calibrated to a material, geometry, bias, or node." }, { "id": "p_transport_limited_proxy", "label": "p-transport-limited proxy", "nChannelResistanceOhm": 380, "pChannelResistanceOhm": 690, "intrinsicCapacitanceFf": 0.5, "note": "Original asymmetric teaching hypothesis for rise/fall separation; not a reported 2D-material result." } ], "contactHypotheses": [ { "id": "channel_only_mathematical_reference", "label": "Channel-only mathematical reference", "nContactResistanceOhm": 0, "pContactResistanceOhm": 0, "evidenceClass": "intentionally_incomplete_reference", "note": "Zero contact resistance is retained only to expose optimistic omission error." }, { "id": "low_symmetric_contact_assumption", "label": "Low symmetric contact assumption", "nContactResistanceOhm": 80, "pContactResistanceOhm": 100, "evidenceClass": "original_assumption", "note": "Original assumed pair for sensitivity analysis; no external contact value is used." }, { "id": "contact_limited_symmetric_assumption", "label": "Contact-limited symmetric assumption", "nContactResistanceOhm": 260, "pContactResistanceOhm": 320, "evidenceClass": "original_assumption", "note": "Original contact-dominated sensitivity state, not a technology prediction." }, { "id": "asymmetric_np_contact_assumption", "label": "Asymmetric n/p contact assumption", "nContactResistanceOhm": 120, "pContactResistanceOhm": 420, "evidenceClass": "original_assumption", "note": "Original polarity-asymmetry state for rise/fall review; no material pair is implied." } ], "parasiticContexts": [ { "id": "intrinsic_only_audit_reference", "label": "Intrinsic-only audit reference", "contactCapacitanceFf": 0, "localInterconnectCapacitanceFf": 0, "localInterconnectResistanceOhm": 0, "routingAreaPenalty": 0, "note": "Intentionally omits layout RC so the incomplete baseline stays visible." }, { "id": "contact_overlap_dominant", "label": "Contact-overlap-dominant context", "contactCapacitanceFf": 0.85, "localInterconnectCapacitanceFf": 0.2, "localInterconnectResistanceOhm": 25, "routingAreaPenalty": 0.05, "note": "Original assumed contact-capacitance sensitivity state." }, { "id": "local_interconnect_dominant", "label": "Local-interconnect-dominant context", "contactCapacitanceFf": 0.25, "localInterconnectCapacitanceFf": 1.25, "localInterconnectResistanceOhm": 90, "routingAreaPenalty": 0.15, "note": "Original assumed local-wire/via RC sensitivity state." }, { "id": "coupled_contact_local_rc", "label": "Coupled contact and local-RC context", "contactCapacitanceFf": 0.7, "localInterconnectCapacitanceFf": 1.1, "localInterconnectResistanceOhm": 120, "routingAreaPenalty": 0.22, "note": "Original combined sensitivity state for cross-domain review." } ], "extractionMaturities": [ { "id": "schematic_only", "label": "Schematic-only estimate", "resistanceFactor": 0, "capacitanceFactor": 0, "uncertaintyPressure": 0.45, "maturityScore": 20, "note": "Layout parasitics are absent even when the row names a layout context." }, { "id": "rule_based_estimate", "label": "Rule-based RC estimate", "resistanceFactor": 0.65, "capacitanceFactor": 0.65, "uncertaintyPressure": 0.3, "maturityScore": 45, "note": "Applies declared scaling factors; no extraction deck or geometry is executed." }, { "id": "geometry_aware_extracted_proxy", "label": "Geometry-aware extracted proxy", "resistanceFactor": 1, "capacitanceFactor": 1, "uncertaintyPressure": 0.18, "maturityScore": 65, "note": "Uses the full declared proxy RC; it is not PEX or a field-solver result." }, { "id": "deterministic_corner_envelope", "label": "Deterministic RC corner envelope", "resistanceFactor": 1.25, "capacitanceFactor": 1.2, "uncertaintyPressure": 0.12, "maturityScore": 80, "note": "A declared sensitivity envelope, not a statistical corner or qualified variation model." } ], "compactModelMaturities": [ { "id": "intrinsic_transport_only", "label": "Intrinsic-transport-only proxy", "channelResistanceFactor": 1, "contactResistanceFactor": 0, "capacitanceFactor": 1, "maturityScore": 25, "note": "Omits contact resistance from the circuit handoff by construction." }, { "id": "contact_aware_static_proxy", "label": "Contact-aware static proxy", "channelResistanceFactor": 1, "contactResistanceFactor": 1, "capacitanceFactor": 1, "maturityScore": 55, "note": "Carries declared contact resistance into RC delay; no fitted compact model is used." }, { "id": "deterministic_variation_envelope", "label": "Deterministic non-ideality envelope", "channelResistanceFactor": 1.12, "contactResistanceFactor": 1.15, "capacitanceFactor": 1.08, "maturityScore": 70, "note": "Applies fixed sensitivity multipliers; it is not Monte Carlo or calibrated variability." } ], "circuitContexts": [ { "id": "inverter_chain_stage", "label": "Inverter-chain stage", "resistanceStackFactor": 1, "loadCapacitanceFf": 2.4, "footprintMultiplier": 1, "note": "Single-stage delay and slew handoff context." }, { "id": "ring_oscillator_stage", "label": "15-stage ring-oscillator context", "resistanceStackFactor": 1, "loadCapacitanceFf": 1.8, "footprintMultiplier": 15, "note": "Equivalent 15-stage frequency proxy from the same per-stage RC equation." }, { "id": "nand2_logic_path", "label": "NAND2 logic-path context", "resistanceStackFactor": 1.55, "loadCapacitanceFf": 3.1, "footprintMultiplier": 1.35, "note": "Series-device resistance pressure and local-load teaching context." }, { "id": "sram_peripheral_buffer", "label": "SRAM peripheral-buffer context", "resistanceStackFactor": 1.2, "loadCapacitanceFf": 4.2, "footprintMultiplier": 1.8, "note": "Peripheral drive/load sensitivity only; no SRAM-cell or array claim." } ], "supplyStates": [ { "id": "low_voltage_proxy", "label": "Low-voltage proxy", "voltageV": 0.45, "resistanceFactor": 1.45 }, { "id": "nominal_voltage_proxy", "label": "Nominal-voltage proxy", "voltageV": 0.6, "resistanceFactor": 1 } ], "evidencePostures": [ { "id": "teaching_proxy_only", "label": "Teaching proxy only", "evidenceScore": 35, "note": "Equations and assumptions are visible; no owned replacement dataset is attached." }, { "id": "replacement_matrix_prepared", "label": "Replacement-evidence matrix prepared", "evidenceScore": 60, "note": "Required owned fields are named, but no measurement, calibrated model, or extracted layout is supplied." } ] }, "metric_contract": { "schema": "semiagora.2d-cfet-contact-parasitic-ppa-metric-contract.v1", "version": "2026-08-25-v101", "experimentId": "SA-DEV-2D-CFET-PPA-003", "purpose": "Expose how declared contact and layout assumptions propagate into bounded RC circuit proxies without importing an external technology result.", "equations": [ { "id": "path-resistance", "expression": "Rpath=(Rchannel*Fchannel + Rcontact*Fcontact + Rlocal*Fextract)*Fstack*Fsupply", "boundary": "All resistances and multipliers are original assumed teaching values; no transport, contact, compact-model, or extraction calibration is implied." }, { "id": "switched-capacitance", "expression": "Ctotal=Cintrinsic*Fmodel + (Ccontact+Clocal)*Fextract*Fmodel + Cload", "boundary": "Lumped fF-scale proxy only; no coupling matrix, distributed RC, nonlinear capacitance, or field solve." }, { "id": "rc-delay", "expression": "trise=0.69*Rp*Ctotal; tfall=0.69*Rn*Ctotal", "boundary": "First-order RC delay in declared proxy units; no waveform, slew, short-circuit, input-shape, or timing-library characterization." }, { "id": "ring-frequency", "expression": "f15=1/(2*15*max(trise,tfall))", "boundary": "Equivalent 15-stage frequency proxy only; no SPICE oscillator startup, waveform, loading, jitter, or measured frequency." }, { "id": "dynamic-energy", "expression": "Edyn=Ctotal*VDD^2", "boundary": "Single-transition capacitive energy proxy; no activity, short-circuit, leakage, clock, interconnect coupling, or thermal model." }, { "id": "routing-adjusted-footprint", "expression": "Aproxy=Fcircuit*(0.58+Prouting*Fextract_cap)", "boundary": "Normalized original footprint proxy; no cell height, contacted pitch, track count, layout, utilization, or node comparison." }, { "id": "delay-energy-area-product", "expression": "DEAproxy=max(trise,tfall)*Edyn*Aproxy", "boundary": "Within-packet sensitivity product only; it cannot rank materials, architectures, nodes, foundries, or products." } ], "sweep": { "transportStates": 2, "contactHypotheses": 4, "parasiticContexts": 4, "extractionMaturities": 4, "compactModelMaturities": 3, "circuitContexts": 4, "supplyStates": 2, "evidencePostures": 2, "rows": 6144 }, "zeroBoundaryFields": [ "external_numeric_values_used", "real_measurement_rows_used", "copied_publication_results_used", "proprietary_models_or_pdk_files_used", "live_tcad_runs", "live_spice_runs", "live_pex_runs", "architecture_or_node_rankings", "ppa_signoff_actions", "live_server_runs" ] }, "gate_counts": { "compact_model_evidence_required": 576, "extraction_evidence_required": 576, "incomplete_reference_only": 2688, "owned_replacement_required": 288, "replacement_plan_required": 288, "resolve_model_scope": 1728 }, "examples": [ { "case_id": "CFET-PPA-0001", "transport_state": "balanced_np_transport_proxy", "transport_state_label": "Balanced n/p transport proxy", "contact_hypothesis": "channel_only_mathematical_reference", "contact_hypothesis_label": "Channel-only mathematical reference", "parasitic_context": "intrinsic_only_audit_reference", "parasitic_context_label": "Intrinsic-only audit reference", "extraction_maturity": "schematic_only", "extraction_maturity_label": "Schematic-only estimate", "compact_model_maturity": "intrinsic_transport_only", "compact_model_maturity_label": "Intrinsic-transport-only proxy", "circuit_context": "inverter_chain_stage", "circuit_context_label": "Inverter-chain stage", "supply_state": "low_voltage_proxy", "supply_state_label": "Low-voltage proxy", "evidence_posture": "teaching_proxy_only", "evidence_posture_label": "Teaching proxy only", "assumed_supply_v": 0.45, "assumed_n_channel_resistance_ohm_proxy": 420, "assumed_p_channel_resistance_ohm_proxy": 500, "assumed_n_contact_resistance_ohm_proxy": 0, "assumed_p_contact_resistance_ohm_proxy": 0, "contact_resistance_pair_ohm_proxy": 0, "extracted_local_interconnect_resistance_ohm_proxy": 0, "modeled_n_path_resistance_ohm_proxy": 609, "modeled_p_path_resistance_ohm_proxy": 725, "assumed_intrinsic_capacitance_ff_proxy": 0.45, "extracted_contact_capacitance_ff_proxy": 0, "extracted_local_capacitance_ff_proxy": 0, "circuit_load_capacitance_ff_proxy": 2.4, "total_switched_capacitance_ff_proxy": 2.85, "fall_delay_ps_proxy": 1.197599, "rise_delay_ps_proxy": 1.425712, "worst_delay_ps_proxy": 1.425712, "equivalent_15_stage_ring_frequency_ghz_proxy": 23.380123, "dynamic_energy_fj_proxy": 0.577125, "contact_resistance_fraction_pct_proxy": 0, "layout_capacitance_fraction_pct_proxy": 0, "routing_adjusted_footprint_proxy": 0.58, "delay_energy_area_product_proxy": 0.477232, "extraction_uncertainty_pressure_proxy": 0.45, "circuit_handoff_readiness_score": 23, "contradiction_count": 2, "contradiction_flags": "ideal_contact_reference_not_physical|intrinsic_only_reference_hides_layout", "contact_boundary": "Zero contact resistance is retained only to expose optimistic omission error.", "parasitic_boundary": "Intentionally omits layout RC so the incomplete baseline stays visible.", "extraction_boundary": "Layout parasitics are absent even when the row names a layout context.", "compact_model_boundary": "Omits contact resistance from the circuit handoff by construction.", "circuit_boundary": "Single-stage delay and slew handoff context.", "evidence_boundary": "Equations and assumptions are visible; no owned replacement dataset is attached.", "covered_node_ids": "kn-fi-061|kn-dv-080|kn-dv-084|kn-dvf-172", "external_numeric_values_used": 0, "real_measurement_rows_used": 0, "copied_publication_results_used": 0, "proprietary_models_or_pdk_files_used": 0, "live_tcad_runs": 0, "live_spice_runs": 0, "live_pex_runs": 0, "architecture_or_node_rankings": 0, "ppa_signoff_actions": 0, "live_server_runs": 0, "evidence_state": "original_deterministic_teaching_proxy", "decision_gate": "incomplete_reference_only", "next_safe_check": "Add owned contact and layout-extraction evidence before using the row for a device or circuit comparison." }, { "case_id": "CFET-PPA-0769", "transport_state": "balanced_np_transport_proxy", "transport_state_label": "Balanced n/p transport proxy", "contact_hypothesis": "low_symmetric_contact_assumption", "contact_hypothesis_label": "Low symmetric contact assumption", "parasitic_context": "intrinsic_only_audit_reference", "parasitic_context_label": "Intrinsic-only audit reference", "extraction_maturity": "schematic_only", "extraction_maturity_label": "Schematic-only estimate", "compact_model_maturity": "intrinsic_transport_only", "compact_model_maturity_label": "Intrinsic-transport-only proxy", "circuit_context": "inverter_chain_stage", "circuit_context_label": "Inverter-chain stage", "supply_state": "low_voltage_proxy", "supply_state_label": "Low-voltage proxy", "evidence_posture": "teaching_proxy_only", "evidence_posture_label": "Teaching proxy only", "assumed_supply_v": 0.45, "assumed_n_channel_resistance_ohm_proxy": 420, "assumed_p_channel_resistance_ohm_proxy": 500, "assumed_n_contact_resistance_ohm_proxy": 80, "assumed_p_contact_resistance_ohm_proxy": 100, "contact_resistance_pair_ohm_proxy": 180, "extracted_local_interconnect_resistance_ohm_proxy": 0, "modeled_n_path_resistance_ohm_proxy": 609, "modeled_p_path_resistance_ohm_proxy": 725, "assumed_intrinsic_capacitance_ff_proxy": 0.45, "extracted_contact_capacitance_ff_proxy": 0, "extracted_local_capacitance_ff_proxy": 0, "circuit_load_capacitance_ff_proxy": 2.4, "total_switched_capacitance_ff_proxy": 2.85, "fall_delay_ps_proxy": 1.197599, "rise_delay_ps_proxy": 1.425712, "worst_delay_ps_proxy": 1.425712, "equivalent_15_stage_ring_frequency_ghz_proxy": 23.380123, "dynamic_energy_fj_proxy": 0.577125, "contact_resistance_fraction_pct_proxy": 0, "layout_capacitance_fraction_pct_proxy": 0, "routing_adjusted_footprint_proxy": 0.58, "delay_energy_area_product_proxy": 0.477232, "extraction_uncertainty_pressure_proxy": 0.45, "circuit_handoff_readiness_score": 23, "contradiction_count": 2, "contradiction_flags": "intrinsic_only_reference_hides_layout|contact_present_but_compact_proxy_omits_it", "contact_boundary": "Original assumed pair for sensitivity analysis; no external contact value is used.", "parasitic_boundary": "Intentionally omits layout RC so the incomplete baseline stays visible.", "extraction_boundary": "Layout parasitics are absent even when the row names a layout context.", "compact_model_boundary": "Omits contact resistance from the circuit handoff by construction.", "circuit_boundary": "Single-stage delay and slew handoff context.", "evidence_boundary": "Equations and assumptions are visible; no owned replacement dataset is attached.", "covered_node_ids": "kn-fi-061|kn-dv-080|kn-dv-084|kn-dvf-172", "external_numeric_values_used": 0, "real_measurement_rows_used": 0, "copied_publication_results_used": 0, "proprietary_models_or_pdk_files_used": 0, "live_tcad_runs": 0, "live_spice_runs": 0, "live_pex_runs": 0, "architecture_or_node_rankings": 0, "ppa_signoff_actions": 0, "live_server_runs": 0, "evidence_state": "original_deterministic_teaching_proxy", "decision_gate": "incomplete_reference_only", "next_safe_check": "Add owned contact and layout-extraction evidence before using the row for a device or circuit comparison." }, { "case_id": "CFET-PPA-2305", "transport_state": "balanced_np_transport_proxy", "transport_state_label": "Balanced n/p transport proxy", "contact_hypothesis": "asymmetric_np_contact_assumption", "contact_hypothesis_label": "Asymmetric n/p contact assumption", "parasitic_context": "intrinsic_only_audit_reference", "parasitic_context_label": "Intrinsic-only audit reference", "extraction_maturity": "schematic_only", "extraction_maturity_label": "Schematic-only estimate", "compact_model_maturity": "intrinsic_transport_only", "compact_model_maturity_label": "Intrinsic-transport-only proxy", "circuit_context": "inverter_chain_stage", "circuit_context_label": "Inverter-chain stage", "supply_state": "low_voltage_proxy", "supply_state_label": "Low-voltage proxy", "evidence_posture": "teaching_proxy_only", "evidence_posture_label": "Teaching proxy only", "assumed_supply_v": 0.45, "assumed_n_channel_resistance_ohm_proxy": 420, "assumed_p_channel_resistance_ohm_proxy": 500, "assumed_n_contact_resistance_ohm_proxy": 120, "assumed_p_contact_resistance_ohm_proxy": 420, "contact_resistance_pair_ohm_proxy": 540, "extracted_local_interconnect_resistance_ohm_proxy": 0, "modeled_n_path_resistance_ohm_proxy": 609, "modeled_p_path_resistance_ohm_proxy": 725, "assumed_intrinsic_capacitance_ff_proxy": 0.45, "extracted_contact_capacitance_ff_proxy": 0, "extracted_local_capacitance_ff_proxy": 0, "circuit_load_capacitance_ff_proxy": 2.4, "total_switched_capacitance_ff_proxy": 2.85, "fall_delay_ps_proxy": 1.197599, "rise_delay_ps_proxy": 1.425712, "worst_delay_ps_proxy": 1.425712, "equivalent_15_stage_ring_frequency_ghz_proxy": 23.380123, "dynamic_energy_fj_proxy": 0.577125, "contact_resistance_fraction_pct_proxy": 0, "layout_capacitance_fraction_pct_proxy": 0, "routing_adjusted_footprint_proxy": 0.58, "delay_energy_area_product_proxy": 0.477232, "extraction_uncertainty_pressure_proxy": 0.45, "circuit_handoff_readiness_score": 23, "contradiction_count": 2, "contradiction_flags": "intrinsic_only_reference_hides_layout|contact_present_but_compact_proxy_omits_it", "contact_boundary": "Original polarity-asymmetry state for rise/fall review; no material pair is implied.", "parasitic_boundary": "Intentionally omits layout RC so the incomplete baseline stays visible.", "extraction_boundary": "Layout parasitics are absent even when the row names a layout context.", "compact_model_boundary": "Omits contact resistance from the circuit handoff by construction.", "circuit_boundary": "Single-stage delay and slew handoff context.", "evidence_boundary": "Equations and assumptions are visible; no owned replacement dataset is attached.", "covered_node_ids": "kn-fi-061|kn-dv-080|kn-dv-084|kn-dvf-172", "external_numeric_values_used": 0, "real_measurement_rows_used": 0, "copied_publication_results_used": 0, "proprietary_models_or_pdk_files_used": 0, "live_tcad_runs": 0, "live_spice_runs": 0, "live_pex_runs": 0, "architecture_or_node_rankings": 0, "ppa_signoff_actions": 0, "live_server_runs": 0, "evidence_state": "original_deterministic_teaching_proxy", "decision_gate": "incomplete_reference_only", "next_safe_check": "Add owned contact and layout-extraction evidence before using the row for a device or circuit comparison." }, { "case_id": "CFET-PPA-4609", "transport_state": "p_transport_limited_proxy", "transport_state_label": "p-transport-limited proxy", "contact_hypothesis": "contact_limited_symmetric_assumption", "contact_hypothesis_label": "Contact-limited symmetric assumption", "parasitic_context": "intrinsic_only_audit_reference", "parasitic_context_label": "Intrinsic-only audit reference", "extraction_maturity": "schematic_only", "extraction_maturity_label": "Schematic-only estimate", "compact_model_maturity": "intrinsic_transport_only", "compact_model_maturity_label": "Intrinsic-transport-only proxy", "circuit_context": "inverter_chain_stage", "circuit_context_label": "Inverter-chain stage", "supply_state": "low_voltage_proxy", "supply_state_label": "Low-voltage proxy", "evidence_posture": "teaching_proxy_only", "evidence_posture_label": "Teaching proxy only", "assumed_supply_v": 0.45, "assumed_n_channel_resistance_ohm_proxy": 380, "assumed_p_channel_resistance_ohm_proxy": 690, "assumed_n_contact_resistance_ohm_proxy": 260, "assumed_p_contact_resistance_ohm_proxy": 320, "contact_resistance_pair_ohm_proxy": 580, "extracted_local_interconnect_resistance_ohm_proxy": 0, "modeled_n_path_resistance_ohm_proxy": 551, "modeled_p_path_resistance_ohm_proxy": 1000.5, "assumed_intrinsic_capacitance_ff_proxy": 0.5, "extracted_contact_capacitance_ff_proxy": 0, "extracted_local_capacitance_ff_proxy": 0, "circuit_load_capacitance_ff_proxy": 2.4, "total_switched_capacitance_ff_proxy": 2.9, "fall_delay_ps_proxy": 1.102551, "rise_delay_ps_proxy": 2.002, "worst_delay_ps_proxy": 2.002, "equivalent_15_stage_ring_frequency_ghz_proxy": 16.650012, "dynamic_energy_fj_proxy": 0.58725, "contact_resistance_fraction_pct_proxy": 0, "layout_capacitance_fraction_pct_proxy": 0, "routing_adjusted_footprint_proxy": 0.58, "delay_energy_area_product_proxy": 0.681891, "extraction_uncertainty_pressure_proxy": 0.45, "circuit_handoff_readiness_score": 23, "contradiction_count": 2, "contradiction_flags": "intrinsic_only_reference_hides_layout|contact_present_but_compact_proxy_omits_it", "contact_boundary": "Original contact-dominated sensitivity state, not a technology prediction.", "parasitic_boundary": "Intentionally omits layout RC so the incomplete baseline stays visible.", "extraction_boundary": "Layout parasitics are absent even when the row names a layout context.", "compact_model_boundary": "Omits contact resistance from the circuit handoff by construction.", "circuit_boundary": "Single-stage delay and slew handoff context.", "evidence_boundary": "Equations and assumptions are visible; no owned replacement dataset is attached.", "covered_node_ids": "kn-fi-061|kn-dv-080|kn-dv-084|kn-dvf-172", "external_numeric_values_used": 0, "real_measurement_rows_used": 0, "copied_publication_results_used": 0, "proprietary_models_or_pdk_files_used": 0, "live_tcad_runs": 0, "live_spice_runs": 0, "live_pex_runs": 0, "architecture_or_node_rankings": 0, "ppa_signoff_actions": 0, "live_server_runs": 0, "evidence_state": "original_deterministic_teaching_proxy", "decision_gate": "incomplete_reference_only", "next_safe_check": "Add owned contact and layout-extraction evidence before using the row for a device or circuit comparison." }, { "case_id": "CFET-PPA-6144", "transport_state": "p_transport_limited_proxy", "transport_state_label": "p-transport-limited proxy", "contact_hypothesis": "asymmetric_np_contact_assumption", "contact_hypothesis_label": "Asymmetric n/p contact assumption", "parasitic_context": "coupled_contact_local_rc", "parasitic_context_label": "Coupled contact and local-RC context", "extraction_maturity": "deterministic_corner_envelope", "extraction_maturity_label": "Deterministic RC corner envelope", "compact_model_maturity": "deterministic_variation_envelope", "compact_model_maturity_label": "Deterministic non-ideality envelope", "circuit_context": "sram_peripheral_buffer", "circuit_context_label": "SRAM peripheral-buffer context", "supply_state": "nominal_voltage_proxy", "supply_state_label": "Nominal-voltage proxy", "evidence_posture": "replacement_matrix_prepared", "evidence_posture_label": "Replacement-evidence matrix prepared", "assumed_supply_v": 0.6, "assumed_n_channel_resistance_ohm_proxy": 380, "assumed_p_channel_resistance_ohm_proxy": 690, "assumed_n_contact_resistance_ohm_proxy": 120, "assumed_p_contact_resistance_ohm_proxy": 420, "contact_resistance_pair_ohm_proxy": 540, "extracted_local_interconnect_resistance_ohm_proxy": 150, "modeled_n_path_resistance_ohm_proxy": 856.32, "modeled_p_path_resistance_ohm_proxy": 1686.96, "assumed_intrinsic_capacitance_ff_proxy": 0.5, "extracted_contact_capacitance_ff_proxy": 0.9072, "extracted_local_capacitance_ff_proxy": 1.4256, "circuit_load_capacitance_ff_proxy": 4.2, "total_switched_capacitance_ff_proxy": 7.0728, "fall_delay_ps_proxy": 4.17904, "rise_delay_ps_proxy": 8.232756, "worst_delay_ps_proxy": 8.232756, "equivalent_15_stage_ring_frequency_ghz_proxy": 4.048867, "dynamic_energy_fj_proxy": 2.546208, "contact_resistance_fraction_pct_proxy": 29.300745, "layout_capacitance_fraction_pct_proxy": 32.982694, "routing_adjusted_footprint_proxy": 1.5192, "delay_energy_area_product_proxy": 31.845941, "extraction_uncertainty_pressure_proxy": 0.12, "circuit_handoff_readiness_score": 75.5, "contradiction_count": 0, "contradiction_flags": "none", "contact_boundary": "Original polarity-asymmetry state for rise/fall review; no material pair is implied.", "parasitic_boundary": "Original combined sensitivity state for cross-domain review.", "extraction_boundary": "A declared sensitivity envelope, not a statistical corner or qualified variation model.", "compact_model_boundary": "Applies fixed sensitivity multipliers; it is not Monte Carlo or calibrated variability.", "circuit_boundary": "Peripheral drive/load sensitivity only; no SRAM-cell or array claim.", "evidence_boundary": "Required owned fields are named, but no measurement, calibrated model, or extracted layout is supplied.", "covered_node_ids": "kn-fi-061|kn-dv-080|kn-dv-084|kn-dvf-172", "external_numeric_values_used": 0, "real_measurement_rows_used": 0, "copied_publication_results_used": 0, "proprietary_models_or_pdk_files_used": 0, "live_tcad_runs": 0, "live_spice_runs": 0, "live_pex_runs": 0, "architecture_or_node_rankings": 0, "ppa_signoff_actions": 0, "live_server_runs": 0, "evidence_state": "original_deterministic_teaching_proxy", "decision_gate": "owned_replacement_required", "next_safe_check": "Attach owned contact metrology, I-V/C-V, compact-model, extracted-layout, circuit, thermal, and uncertainty evidence before any PPA claim." } ], "methods": [ "Generate the full deterministic 2 x 4 x 4 x 4 x 3 x 4 x 2 x 2 Cartesian sweep with no random sampling or hidden solver.", "Carry declared channel and contact resistance, extracted local resistance, intrinsic/contact/local/load capacitance, circuit stack/load, and supply factors through first-order RC delay, equivalent ring-frequency, dynamic-energy, and normalized footprint equations.", "Preserve schematic, rule-estimated, geometry-proxy, and corner-envelope extraction states separately from intrinsic-only, contact-aware, and fixed non-ideality model states.", "Emit contradiction flags whenever the declared contact, parasitic, model, extraction, or evidence posture disagrees, then route every row to an owned-evidence replacement check." ], "public_boundary": [ "All 6,144 rows and numeric coefficients are original deterministic SemiAgora teaching assumptions; zero external device, contact, parasitic, layout, model, measurement, or PPA value is used.", "No A2 feasibility, 2D material readiness, contacted-pitch scaling, architecture winner, foundry comparison, cost/yield forecast, or production recommendation is made.", "No quantum transport, TCAD, compact-model fitting, SPICE, ring-oscillator startup, PEX, field solver, STA, power analysis, thermal solve, Monte Carlo, upload parser, or live server execution occurs.", "The RC, delay, energy, area, frequency, and readiness fields are bounded sensitivity proxies, not device specifications, timing-library values, extracted design results, or signoff evidence.", "A real claim requires owned geometry/material/contact metrology, bias- and temperature-tagged I-V/C-V, calibrated compact models, extraction tech and convergence lineage, circuit/layout correlation, thermal and variation evidence, and accountable cross-domain review." ], "sources": [ { "id": "src-arxiv-2d-cfet-a2-2607-12707", "label": "2D GAA CFET multiscale PPA preprint metadata", "organization": "arXiv / research authors", "url": "https://arxiv.org/abs/2607.12707", "sourceClass": "primary-preprint-metadata", "rights": "Public metadata, abstract, and link only; no PDF text, figure, table, equation, process dimension, model parameter, or PPA result is mirrored.", "note": "Scope anchor for the contact-to-parasitic-to-circuit evidence chain; all packet numbers remain original SemiAgora assumptions." }, { "id": "src-imec-2d-material-logic-roadmap", "label": "imec: 2D-material devices in the logic scaling roadmap", "organization": "imec", "url": "https://www.imec-int.com/en/articles/introducing-2d-material-based-devices-logic-scaling-roadmap", "sourceClass": "rights-holder-research-roadmap", "rights": "Rights-holder link and original synthesis only; no article text, image, figure, process flow, device value, or material recommendation is copied.", "note": "Integration, contact, doping, variability, and staged-evidence vocabulary anchor." }, { "id": "src-imec-monolithic-cfet-contacts-2024", "label": "imec: monolithic CFET stacked bottom and top contacts", "organization": "imec", "url": "https://www.imec-int.com/en/press/imec-demonstrates-functional-monolithic-cfet-devices-stacked-bottom-and-top-contacts", "sourceClass": "rights-holder-research-summary", "rights": "Rights-holder link and original synthesis only; no image, process condition, device curve, yield value, or reported result is reused.", "note": "Stacked-contact, frontside/backside access, isolation, and process-window evidence vocabulary anchor." }, { "id": "src-imec-mcfet-scaling-2026", "label": "imec: scaling monolithic CFET across logic nodes", "organization": "imec", "url": "https://www.imec-int.com/en/articles/performance-boosters-scale-monolithic-cfet-across-multiple-logic-technology-nodes", "sourceClass": "rights-holder-research-summary", "rights": "Rights-holder link and original synthesis only; no ring-oscillator result, layout dimension, device curve, figure, or process detail is copied.", "note": "Device-to-ring-oscillator PPA handoff and backside-contact scope anchor without importing reported values." }, { "id": "src-imec-logic-roadmap", "label": "imec: logic technology roadmap", "organization": "imec", "url": "https://www.imec-int.com/en/articles/view-logic-technology-roadmap", "sourceClass": "rights-holder-research-roadmap", "rights": "Rights-holder link and original synthesis only; no figures, dimensions, materials table, or performance result is copied.", "note": "FEOL/MOL/BEOL, contact resistance, local interconnect, via, routing, and DTCO vocabulary anchor." }, { "id": "src-nist-irds-metrology-2024", "label": "NIST: IRDS 2024 metrology chapter", "organization": "NIST / IRDS", "url": "https://www.nist.gov/publications/international-roadmap-devices-and-systems-tm-2024-metrology", "sourceClass": "government-roadmap-metadata", "rights": "Official publication metadata and link only; no roadmap body, table, figure, or requirement is mirrored.", "note": "Measurement readiness, structure-function linkage, uncertainty, and manufacturability evidence anchor." }, { "id": "src-nist-emerging-fet-benchmarking", "label": "NIST: reporting and benchmarking emerging FETs", "organization": "NIST / Nature Electronics authors", "url": "https://www.nist.gov/publications/how-report-and-benchmark-emerging-field-effect-transistors", "sourceClass": "government-primary-publication-metadata", "rights": "Official publication metadata and link only; no paper body, guideline text, figure, table, benchmark, or device value is copied.", "note": "Geometry, contact, bias, extraction, and comparison-contract evidence anchor." }, { "id": "src-nist-2d-interface-flatness", "label": "NIST: 2D interface flatness and contact-region metrology", "organization": "NIST", "url": "https://www.nist.gov/news-events/news/2022/06/road-tiny-transistors-how-flat-flat", "sourceClass": "government-research-summary", "rights": "Official link and original synthesis only; no image, microscopy result, dimension, device value, or article text is copied.", "note": "Interface morphology, contact-region structure, and measurement boundary anchor." }, { "id": "src-bsim-models", "label": "UC Berkeley BSIM model families", "organization": "UC Berkeley BSIM Group", "url": "https://www.bsim.berkeley.edu/models/", "sourceClass": "compact-model-reference", "rights": "Official model distribution and documentation links; model-specific licenses apply. No package, parameter, equation, or code is mirrored.", "note": "Compact-model provenance and replacement-model boundary anchor." } ] }