# DRAM Refresh, RowHammer, And ECC Guardband Replay

- Experiment ID: SA-MEM-DRAM-RELIABILITY-003
- Website route: /simulations/dram-refresh-rowhammer-ecc-guardband-replay
- Execution mode: precomputed browser CSV replay only
- Dataset: dram-refresh-rowhammer-ecc-guardband-replay-v85.csv
- Rows: 4096
- Live server runs: 0

## Purpose

This replay gives DRAM/HBM learners a single table for retention tails, temperature, refresh policy, activation pressure, RowHammer disturbance risk, ECC/protection coverage, residual risk, thermal stress, and the next evidence check. It is designed for study, lesson planning, and paper-method discipline.

## Source Spine

- [Purdue Semiconductor Memory 101](https://engineering.purdue.edu/online/semiconductors/semiconductor-memory-101) - Public memory-course anchor for DRAM, SRAM, Flash, emerging memory, hierarchy, reliability, packaging, and system-management vocabulary.
- [Micron DDR5 SDRAM public product page](https://www.micron.com/products/memory/dram-components/ddr5-sdram) - Public DDR5/RAS vocabulary anchor used link-first only, not as a product recommendation or timing calibration.
- [Micron DDR5 RAS feature discussion](https://www.micron.com/about/blog/company/partners/redefining-performance-with-ddr5-and-4th-gen-intel-xeon-scalable) - Public source for same-bank refresh, on-die ECC, and error-check/scrub vocabulary without copying product tables or vendor claims.
- [Google Security Rowhammer research support](https://blog.google/security/supporting-rowhammer-research-to/) - Public 2025 signal that RowHammer remains an ecosystem reliability/security issue; used as a defense-oriented context anchor only.
- [CMU-SAFARI BlockHammer](https://github.com/CMU-SAFARI/BlockHammer) - Public RowHammer mitigation research repository anchor; SemiAgora does not copy code or teach attack procedures.
- [Ramulator2 public memory-system simulator](https://github.com/CMU-SAFARI/ramulator2) - Public simulator anchor for future local-build study; v85 does not run it on the server or accept traces.
- [DRAMsim3 public simulator](https://github.com/umd-memsys/DRAMsim3) - Public DRAM timing/controller/thermal simulator anchor; v85 stores only original synthetic replay rows.
- [RowHammer retrospective](https://arxiv.org/abs/1904.09724) - Research metadata/source anchor for RowHammer as a circuit-level reliability effect with system-security consequences.
- [USENIX Security 2025 DDR4 ECC RowHammer study](https://www.usenix.org/conference/usenixsecurity25/presentation/kamadan) - Research anchor for ECC and mitigation limits; SemiAgora uses only high-level evidence vocabulary and no exploit workflow.

## Method

1. Build a Cartesian synthetic sweep over memory context, retention-tail class, temperature class, access pattern, refresh policy, and protection policy.
2. Convert the sweep into normalized proxy scores for retention stress, refresh overhead, availability latency tax, activation pressure, RowHammer risk, ECC coverage, residual uncorrectable risk, thermal stress, and guardband.
3. Assign decision gates for retention-tail review, refresh-tax review, RowHammer mitigation review, ECC/scrub review, thermal-system review, or bounded lesson reuse.
4. Keep every row explicitly marked as synthetic teaching evidence.

## Public Boundary

- No RowHammer attack workflow, exploit code, reverse-engineering procedure, DIMM test recipe, BIOS setting, memory-controller programming, trace upload, or live simulator is provided.
- No JEDEC table, vendor datasheet row, internal TRR behavior, ECC implementation, product recommendation, DIMM qualification, reliability signoff, or security assurance is claimed.
- No article body, paper figure, code body, simulator implementation, product table, paid source text, PDK, model deck, or restricted standard is copied.

## Replacement Evidence Needed

Real engineering reuse would need owned retention distributions, temperature profiles, refresh behavior, workload traces, activation logs, syndrome/scrub records, thermal maps, exact device/controller context, and product-owner review.
