{ "schema": "semiagora.dram-refresh-rowhammer-ecc-guardband.v1", "version": "2026-08-22-v85", "experiment_id": "SA-MEM-DRAM-RELIABILITY-003", "slug": "dram-refresh-rowhammer-ecc-guardband-replay", "route": "/simulations/dram-refresh-rowhammer-ecc-guardband-replay", "lesson_route": "/learn/dram-reliability-refresh-rowhammer-ecc", "lab_route": "/labs/dram-reliability-refresh-rowhammer-ecc", "title": "DRAM refresh, RowHammer, and ECC guardband replay", "execution_mode": "precomputed_browser_csv_replay_only", "counts": { "rows": 4096, "memory_contexts": 4, "retention_tail_classes": 4, "temperature_classes": 4, "access_patterns": 4, "refresh_policies": 4, "protection_policies": 4, "liveServerRuns": 0 }, "source_summary": "Public source anchors were used link-first for vocabulary and topic framing only. SemiAgora generated original synthetic teaching rows and did not copy article bodies, paper figures, simulator code, standards tables, DIMM data, or product specifications.", "sources": [ { "label": "Purdue Semiconductor Memory 101", "url": "https://engineering.purdue.edu/online/semiconductors/semiconductor-memory-101", "note": "Public memory-course anchor for DRAM, SRAM, Flash, emerging memory, hierarchy, reliability, packaging, and system-management vocabulary." }, { "label": "Micron DDR5 SDRAM public product page", "url": "https://www.micron.com/products/memory/dram-components/ddr5-sdram", "note": "Public DDR5/RAS vocabulary anchor used link-first only, not as a product recommendation or timing calibration." }, { "label": "Micron DDR5 RAS feature discussion", "url": "https://www.micron.com/about/blog/company/partners/redefining-performance-with-ddr5-and-4th-gen-intel-xeon-scalable", "note": "Public source for same-bank refresh, on-die ECC, and error-check/scrub vocabulary without copying product tables or vendor claims." }, { "label": "Google Security Rowhammer research support", "url": "https://blog.google/security/supporting-rowhammer-research-to/", "note": "Public 2025 signal that RowHammer remains an ecosystem reliability/security issue; used as a defense-oriented context anchor only." }, { "label": "CMU-SAFARI BlockHammer", "url": "https://github.com/CMU-SAFARI/BlockHammer", "note": "Public RowHammer mitigation research repository anchor; SemiAgora does not copy code or teach attack procedures." }, { "label": "Ramulator2 public memory-system simulator", "url": "https://github.com/CMU-SAFARI/ramulator2", "note": "Public simulator anchor for future local-build study; v85 does not run it on the server or accept traces." }, { "label": "DRAMsim3 public simulator", "url": "https://github.com/umd-memsys/DRAMsim3", "note": "Public DRAM timing/controller/thermal simulator anchor; v85 stores only original synthetic replay rows." }, { "label": "RowHammer retrospective", "url": "https://arxiv.org/abs/1904.09724", "note": "Research metadata/source anchor for RowHammer as a circuit-level reliability effect with system-security consequences." }, { "label": "USENIX Security 2025 DDR4 ECC RowHammer study", "url": "https://www.usenix.org/conference/usenixsecurity25/presentation/kamadan", "note": "Research anchor for ECC and mitigation limits; SemiAgora uses only high-level evidence vocabulary and no exploit workflow." } ], "axes": { "memory_contexts": [ { "id": "ddr5_server_rdimm", "label": "DDR5 server RDIMM study case", "baseRefreshTax": 0.28, "bankParallelismRelief": 0.18, "thermalCoupling": 0.34, "eccExpectation": 0.72, "availabilityPressure": 0.74, "note": "server memory makes RAS, scrub, ECC, and availability language visible" }, { "id": "lpddr_mobile_thermal", "label": "LPDDR mobile thermal case", "baseRefreshTax": 0.22, "bankParallelismRelief": 0.1, "thermalCoupling": 0.58, "eccExpectation": 0.48, "availabilityPressure": 0.46, "note": "mobile memory highlights power and temperature-compensated retention pressure" }, { "id": "hbm_stack_hotspot", "label": "HBM stack hotspot case", "baseRefreshTax": 0.34, "bankParallelismRelief": 0.25, "thermalCoupling": 0.76, "eccExpectation": 0.66, "availabilityPressure": 0.88, "note": "stacked DRAM makes thermal headroom and refresh tax easier to see" }, { "id": "industrial_edge_wide_temp", "label": "Industrial edge wide-temperature case", "baseRefreshTax": 0.3, "bankParallelismRelief": 0.08, "thermalCoupling": 0.68, "eccExpectation": 0.58, "availabilityPressure": 0.62, "note": "wide-temperature service requires retention guardband discipline" } ], "retention_tails": [ { "id": "nominal_tail", "label": "Nominal retention tail", "leakage": 0.2, "variability": 0.18, "vRT": 0.05, "weakCellShare": 0.04, "note": "baseline before weak-tail or variable-retention-time review" }, { "id": "high_leak_tail", "label": "High-leakage tail", "leakage": 0.48, "variability": 0.34, "vRT": 0.1, "weakCellShare": 0.12, "note": "tail cells drive refresh policy more than the median cell" }, { "id": "variable_retention_watch", "label": "Variable retention watch", "leakage": 0.42, "variability": 0.58, "vRT": 0.32, "weakCellShare": 0.15, "note": "retention can move over time, so one characterization pass is not enough" }, { "id": "weak_tail_screening_gap", "label": "Weak-tail screening gap", "leakage": 0.62, "variability": 0.72, "vRT": 0.28, "weakCellShare": 0.24, "note": "guardband and screening assumptions dominate the safe reuse question" } ], "temperature_classes": [ { "id": "cool_45c_proxy", "label": "Cool 45 C proxy", "tempStress": 0.12, "refreshMultiplier": 0.7, "powerPenalty": 0.1 }, { "id": "nominal_65c_proxy", "label": "Nominal 65 C proxy", "tempStress": 0.32, "refreshMultiplier": 1, "powerPenalty": 0.22 }, { "id": "hot_85c_proxy", "label": "Hot 85 C proxy", "tempStress": 0.62, "refreshMultiplier": 1.62, "powerPenalty": 0.42 }, { "id": "extreme_95c_proxy", "label": "Extreme 95 C proxy", "tempStress": 0.82, "refreshMultiplier": 2.2, "powerPenalty": 0.58 } ], "access_patterns": [ { "id": "row_buffer_friendly_stream", "label": "Row-buffer-friendly stream", "activation": 0.24, "locality": 0.8, "hammerShape": 0.08, "qosPenalty": 0.18, "note": "mostly teaches refresh tax under benign locality" }, { "id": "random_bank_mixed", "label": "Random bank-mixed service", "activation": 0.48, "locality": 0.36, "hammerShape": 0.2, "qosPenalty": 0.42, "note": "bank and queue pressure make refresh interference visible" }, { "id": "high_activation_watch", "label": "High-activation disturbance watch", "activation": 0.78, "locality": 0.22, "hammerShape": 0.64, "qosPenalty": 0.58, "note": "safe public label for disturbance-risk study; not an attack recipe" }, { "id": "refresh_interference_heavy", "label": "Refresh-interference-heavy workload", "activation": 0.58, "locality": 0.46, "hammerShape": 0.3, "qosPenalty": 0.72, "note": "availability and latency tax dominate the decision" } ], "refresh_policies": [ { "id": "baseline_periodic_refresh", "label": "Baseline periodic refresh", "strength": 0.38, "tax": 0.96, "hammerRelief": 0.1, "latencyRelief": 0, "note": "baseline teaching case; not a standards claim" }, { "id": "temperature_compensated_refresh", "label": "Temperature-compensated refresh", "strength": 0.62, "tax": 1.2, "hammerRelief": 0.14, "latencyRelief": 0.04, "note": "refresh rate follows thermal stress rather than fixed intuition" }, { "id": "fine_granularity_same_bank_proxy", "label": "Fine-granularity / same-bank proxy", "strength": 0.7, "tax": 1.05, "hammerRelief": 0.18, "latencyRelief": 0.18, "note": "teaches that where refresh lands can change availability cost" }, { "id": "targeted_neighbor_refresh_watch", "label": "Targeted neighbor-refresh watch", "strength": 0.8, "tax": 1.32, "hammerRelief": 0.42, "latencyRelief": 0.02, "note": "defense vocabulary only; no internal TRR or attack procedure is taught" } ], "protection_policies": [ { "id": "no_ecc_study_only", "label": "No-ECC study-only baseline", "coverage": 0.1, "detection": 0.16, "latencyTax": 0, "confidence": 0.2, "note": "useful only for showing what protection is not covering" }, { "id": "on_die_ecc_visibility", "label": "On-die ECC visibility", "coverage": 0.36, "detection": 0.34, "latencyTax": 0.02, "confidence": 0.46, "note": "device-side correction visibility is not the same as end-to-end system proof" }, { "id": "host_secded_guardband", "label": "Host SECDED guardband", "coverage": 0.58, "detection": 0.72, "latencyTax": 0.05, "confidence": 0.62, "note": "single-error correction does not prove multi-bit disturbance safety" }, { "id": "scrubbed_strong_ecc_review", "label": "Scrubbed strong-ECC review", "coverage": 0.76, "detection": 0.86, "latencyTax": 0.1, "confidence": 0.78, "note": "stronger protection still needs workload, scrub interval, and evidence review" } ] }, "role_views": [ { "role": "memory_device_view", "reads": [ "retention_tail", "temperature_class", "retention_stress_score", "data_integrity_guardband_score" ], "asks": "Which weak-tail and thermal condition controls the refresh boundary?" }, { "role": "controller_view", "reads": [ "access_pattern", "refresh_policy", "refresh_overhead_index", "availability_latency_tax" ], "asks": "Does refresh policy change quality-of-service or bandwidth tax before the workload claim is reused?" }, { "role": "system_reliability_security_view", "reads": [ "hammer_risk_proxy", "protection_policy", "ecc_detection_coverage_proxy", "residual_uncorrectable_risk_proxy" ], "asks": "What fault universe and mitigation evidence are required before ECC or RowHammer language becomes safe?" }, { "role": "yield_and_product_boundary_view", "reads": [ "decision_gate", "evidence_state", "next_safe_check" ], "asks": "Which proxy row needs owned retention, thermal, activation, syndrome, scrub, or qualification evidence?" } ], "decision_gate_summary": { "bounded_study_candidate": 1459, "ecc_coverage_review": 377, "refresh_tax_review": 277, "rowhammer_mitigation_review": 288, "study_window": 1479, "thermal_system_review": 216 }, "top_risk_rows": [ { "case_id": "DRAMREL003-3040", "memory_context": "hbm_stack_hotspot", "context_label": "HBM stack hotspot case", "context_note": "stacked DRAM makes thermal headroom and refresh tax easier to see", "retention_tail": "weak_tail_screening_gap", "retention_tail_note": "guardband and screening assumptions dominate the safe reuse question", "temperature_class": "extreme_95c_proxy", "access_pattern": "high_activation_watch", "access_note": "safe public label for disturbance-risk study; not an attack recipe", "refresh_policy": "baseline_periodic_refresh", "refresh_note": "baseline teaching case; not a standards claim", "protection_policy": "no_ecc_study_only", "protection_note": "useful only for showing what protection is not covering", "retention_stress_score": "0.770", "refresh_overhead_index": "0.796", "availability_latency_tax": "0.785", "activation_pressure_index": "0.750", "hammer_risk_proxy": "0.791", "ecc_detection_coverage_proxy": "0.167", "residual_uncorrectable_risk_proxy": "0.981", "thermal_power_stress_proxy": "0.851", "data_integrity_guardband_score": "0.138", "decision_gate": "rowhammer_mitigation_review", "evidence_state": "needs_disturbance_test_or_public_research_context", "next_safe_check": "review_activation_pressure_without_publishing_attack_workflow" }, { "case_id": "DRAMREL003-4064", "memory_context": "industrial_edge_wide_temp", "context_label": "Industrial edge wide-temperature case", "context_note": "wide-temperature service requires retention guardband discipline", "retention_tail": "weak_tail_screening_gap", "retention_tail_note": "guardband and screening assumptions dominate the safe reuse question", "temperature_class": "extreme_95c_proxy", "access_pattern": "high_activation_watch", "access_note": "safe public label for disturbance-risk study; not an attack recipe", "refresh_policy": "baseline_periodic_refresh", "refresh_note": "baseline teaching case; not a standards claim", "protection_policy": "no_ecc_study_only", "protection_note": "useful only for showing what protection is not covering", "retention_stress_score": "0.759", "refresh_overhead_index": "0.745", "availability_latency_tax": "0.702", "activation_pressure_index": "0.744", "hammer_risk_proxy": "0.789", "ecc_detection_coverage_proxy": "0.159", "residual_uncorrectable_risk_proxy": "0.980", "thermal_power_stress_proxy": "0.820", "data_integrity_guardband_score": "0.154", "decision_gate": "rowhammer_mitigation_review", "evidence_state": "needs_disturbance_test_or_public_research_context", "next_safe_check": "review_activation_pressure_without_publishing_attack_workflow" }, { "case_id": "DRAMREL003-2016", "memory_context": "lpddr_mobile_thermal", "context_label": "LPDDR mobile thermal case", "context_note": "mobile memory highlights power and temperature-compensated retention pressure", "retention_tail": "weak_tail_screening_gap", "retention_tail_note": "guardband and screening assumptions dominate the safe reuse question", "temperature_class": "extreme_95c_proxy", "access_pattern": "high_activation_watch", "access_note": "safe public label for disturbance-risk study; not an attack recipe", "refresh_policy": "baseline_periodic_refresh", "refresh_note": "baseline teaching case; not a standards claim", "protection_policy": "no_ecc_study_only", "protection_note": "useful only for showing what protection is not covering", "retention_stress_score": "0.745", "refresh_overhead_index": "0.572", "availability_latency_tax": "0.563", "activation_pressure_index": "0.733", "hammer_risk_proxy": "0.786", "ecc_detection_coverage_proxy": "0.149", "residual_uncorrectable_risk_proxy": "0.978", "thermal_power_stress_proxy": "0.757", "data_integrity_guardband_score": "0.195", "decision_gate": "rowhammer_mitigation_review", "evidence_state": "needs_disturbance_test_or_public_research_context", "next_safe_check": "review_activation_pressure_without_publishing_attack_workflow" }, { "case_id": "DRAMREL003-0992", "memory_context": "ddr5_server_rdimm", "context_label": "DDR5 server RDIMM study case", "context_note": "server memory makes RAS, scrub, ECC, and availability language visible", "retention_tail": "weak_tail_screening_gap", "retention_tail_note": "guardband and screening assumptions dominate the safe reuse question", "temperature_class": "extreme_95c_proxy", "access_pattern": "high_activation_watch", "access_note": "safe public label for disturbance-risk study; not an attack recipe", "refresh_policy": "baseline_periodic_refresh", "refresh_note": "baseline teaching case; not a standards claim", "protection_policy": "no_ecc_study_only", "protection_note": "useful only for showing what protection is not covering", "retention_stress_score": "0.711", "refresh_overhead_index": "0.683", "availability_latency_tax": "0.687", "activation_pressure_index": "0.741", "hammer_risk_proxy": "0.788", "ecc_detection_coverage_proxy": "0.173", "residual_uncorrectable_risk_proxy": "0.958", "thermal_power_stress_proxy": "0.722", "data_integrity_guardband_score": "0.198", "decision_gate": "rowhammer_mitigation_review", "evidence_state": "needs_disturbance_test_or_public_research_context", "next_safe_check": "review_activation_pressure_without_publishing_attack_workflow" }, { "case_id": "DRAMREL003-3044", "memory_context": "hbm_stack_hotspot", "context_label": "HBM stack hotspot case", "context_note": "stacked DRAM makes thermal headroom and refresh tax easier to see", "retention_tail": "weak_tail_screening_gap", "retention_tail_note": "guardband and screening assumptions dominate the safe reuse question", "temperature_class": "extreme_95c_proxy", "access_pattern": "high_activation_watch", "access_note": "safe public label for disturbance-risk study; not an attack recipe", "refresh_policy": "temperature_compensated_refresh", "refresh_note": "refresh rate follows thermal stress rather than fixed intuition", "protection_policy": "no_ecc_study_only", "protection_note": "useful only for showing what protection is not covering", "retention_stress_score": "0.712", "refresh_overhead_index": "0.966", "availability_latency_tax": "0.891", "activation_pressure_index": "0.750", "hammer_risk_proxy": "0.774", "ecc_detection_coverage_proxy": "0.167", "residual_uncorrectable_risk_proxy": "0.949", "thermal_power_stress_proxy": "0.889", "data_integrity_guardband_score": "0.138", "decision_gate": "rowhammer_mitigation_review", "evidence_state": "needs_disturbance_test_or_public_research_context", "next_safe_check": "review_activation_pressure_without_publishing_attack_workflow" }, { "case_id": "DRAMREL003-4068", "memory_context": "industrial_edge_wide_temp", "context_label": "Industrial edge wide-temperature case", "context_note": "wide-temperature service requires retention guardband discipline", "retention_tail": "weak_tail_screening_gap", "retention_tail_note": "guardband and screening assumptions dominate the safe reuse question", "temperature_class": "extreme_95c_proxy", "access_pattern": "high_activation_watch", "access_note": "safe public label for disturbance-risk study; not an attack recipe", "refresh_policy": "temperature_compensated_refresh", "refresh_note": "refresh rate follows thermal stress rather than fixed intuition", "protection_policy": "no_ecc_study_only", "protection_note": "useful only for showing what protection is not covering", "retention_stress_score": "0.701", "refresh_overhead_index": "0.894", "availability_latency_tax": "0.794", "activation_pressure_index": "0.744", "hammer_risk_proxy": "0.772", "ecc_detection_coverage_proxy": "0.159", "residual_uncorrectable_risk_proxy": "0.948", "thermal_power_stress_proxy": "0.853", "data_integrity_guardband_score": "0.158", "decision_gate": "rowhammer_mitigation_review", "evidence_state": "needs_disturbance_test_or_public_research_context", "next_safe_check": "review_activation_pressure_without_publishing_attack_workflow" }, { "case_id": "DRAMREL003-2020", "memory_context": "lpddr_mobile_thermal", "context_label": "LPDDR mobile thermal case", "context_note": "mobile memory highlights power and temperature-compensated retention pressure", "retention_tail": "weak_tail_screening_gap", "retention_tail_note": "guardband and screening assumptions dominate the safe reuse question", "temperature_class": "extreme_95c_proxy", "access_pattern": "high_activation_watch", "access_note": "safe public label for disturbance-risk study; not an attack recipe", "refresh_policy": "temperature_compensated_refresh", "refresh_note": "refresh rate follows thermal stress rather than fixed intuition", "protection_policy": "no_ecc_study_only", "protection_note": "useful only for showing what protection is not covering", "retention_stress_score": "0.687", "refresh_overhead_index": "0.679", "availability_latency_tax": "0.629", "activation_pressure_index": "0.733", "hammer_risk_proxy": "0.769", "ecc_detection_coverage_proxy": "0.149", "residual_uncorrectable_risk_proxy": "0.946", "thermal_power_stress_proxy": "0.781", "data_integrity_guardband_score": "0.207", "decision_gate": "rowhammer_mitigation_review", "evidence_state": "needs_disturbance_test_or_public_research_context", "next_safe_check": "review_activation_pressure_without_publishing_attack_workflow" }, { "case_id": "DRAMREL003-2976", "memory_context": "hbm_stack_hotspot", "context_label": "HBM stack hotspot case", "context_note": "stacked DRAM makes thermal headroom and refresh tax easier to see", "retention_tail": "weak_tail_screening_gap", "retention_tail_note": "guardband and screening assumptions dominate the safe reuse question", "temperature_class": "hot_85c_proxy", "access_pattern": "high_activation_watch", "access_note": "safe public label for disturbance-risk study; not an attack recipe", "refresh_policy": "baseline_periodic_refresh", "refresh_note": "baseline teaching case; not a standards claim", "protection_policy": "no_ecc_study_only", "protection_note": "useful only for showing what protection is not covering", "retention_stress_score": "0.700", "refresh_overhead_index": "0.606", "availability_latency_tax": "0.668", "activation_pressure_index": "0.750", "hammer_risk_proxy": "0.759", "ecc_detection_coverage_proxy": "0.167", "residual_uncorrectable_risk_proxy": "0.932", "thermal_power_stress_proxy": "0.688", "data_integrity_guardband_score": "0.232", "decision_gate": "rowhammer_mitigation_review", "evidence_state": "needs_disturbance_test_or_public_research_context", "next_safe_check": "review_activation_pressure_without_publishing_attack_workflow" }, { "case_id": "DRAMREL003-4000", "memory_context": "industrial_edge_wide_temp", "context_label": "Industrial edge wide-temperature case", "context_note": "wide-temperature service requires retention guardband discipline", "retention_tail": "weak_tail_screening_gap", "retention_tail_note": "guardband and screening assumptions dominate the safe reuse question", "temperature_class": "hot_85c_proxy", "access_pattern": "high_activation_watch", "access_note": "safe public label for disturbance-risk study; not an attack recipe", "refresh_policy": "baseline_periodic_refresh", "refresh_note": "baseline teaching case; not a standards claim", "protection_policy": "no_ecc_study_only", "protection_note": "useful only for showing what protection is not covering", "retention_stress_score": "0.689", "refresh_overhead_index": "0.578", "availability_latency_tax": "0.598", "activation_pressure_index": "0.744", "hammer_risk_proxy": "0.757", "ecc_detection_coverage_proxy": "0.159", "residual_uncorrectable_risk_proxy": "0.931", "thermal_power_stress_proxy": "0.662", "data_integrity_guardband_score": "0.244", "decision_gate": "rowhammer_mitigation_review", "evidence_state": "needs_disturbance_test_or_public_research_context", "next_safe_check": "review_activation_pressure_without_publishing_attack_workflow" }, { "case_id": "DRAMREL003-1952", "memory_context": "lpddr_mobile_thermal", "context_label": "LPDDR mobile thermal case", "context_note": "mobile memory highlights power and temperature-compensated retention pressure", "retention_tail": "weak_tail_screening_gap", "retention_tail_note": "guardband and screening assumptions dominate the safe reuse question", "temperature_class": "hot_85c_proxy", "access_pattern": "high_activation_watch", "access_note": "safe public label for disturbance-risk study; not an attack recipe", "refresh_policy": "baseline_periodic_refresh", "refresh_note": "baseline teaching case; not a standards claim", "protection_policy": "no_ecc_study_only", "protection_note": "useful only for showing what protection is not covering", "retention_stress_score": "0.675", "refresh_overhead_index": "0.450", "availability_latency_tax": "0.487", "activation_pressure_index": "0.733", "hammer_risk_proxy": "0.754", "ecc_detection_coverage_proxy": "0.149", "residual_uncorrectable_risk_proxy": "0.929", "thermal_power_stress_proxy": "0.609", "data_integrity_guardband_score": "0.277", "decision_gate": "rowhammer_mitigation_review", "evidence_state": "needs_disturbance_test_or_public_research_context", "next_safe_check": "review_activation_pressure_without_publishing_attack_workflow" } ], "bounded_study_candidates": [ { "case_id": "DRAMREL003-0000", "memory_context": "ddr5_server_rdimm", "context_label": "DDR5 server RDIMM study case", "context_note": "server memory makes RAS, scrub, ECC, and availability language visible", "retention_tail": "nominal_tail", "retention_tail_note": "baseline before weak-tail or variable-retention-time review", "temperature_class": "cool_45c_proxy", "access_pattern": "row_buffer_friendly_stream", "access_note": "mostly teaches refresh tax under benign locality", "refresh_policy": "baseline_periodic_refresh", "refresh_note": "baseline teaching case; not a standards claim", "protection_policy": "no_ecc_study_only", "protection_note": "useful only for showing what protection is not covering", "retention_stress_score": "0.132", "refresh_overhead_index": "0.192", "availability_latency_tax": "0.303", "activation_pressure_index": "0.248", "hammer_risk_proxy": "0.116", "ecc_detection_coverage_proxy": "0.173", "residual_uncorrectable_risk_proxy": "0.151", "thermal_power_stress_proxy": "0.201", "data_integrity_guardband_score": "0.914", "decision_gate": "bounded_study_candidate", "evidence_state": "safe_for_lesson_figure_only", "next_safe_check": "keep_model_card_and_public_boundary_attached" }, { "case_id": "DRAMREL003-0001", "memory_context": "ddr5_server_rdimm", "context_label": "DDR5 server RDIMM study case", "context_note": "server memory makes RAS, scrub, ECC, and availability language visible", "retention_tail": "nominal_tail", "retention_tail_note": "baseline before weak-tail or variable-retention-time review", "temperature_class": "cool_45c_proxy", "access_pattern": "row_buffer_friendly_stream", "access_note": "mostly teaches refresh tax under benign locality", "refresh_policy": "baseline_periodic_refresh", "refresh_note": "baseline teaching case; not a standards claim", "protection_policy": "on_die_ecc_visibility", "protection_note": "device-side correction visibility is not the same as end-to-end system proof", "retention_stress_score": "0.132", "refresh_overhead_index": "0.192", "availability_latency_tax": "0.323", "activation_pressure_index": "0.248", "hammer_risk_proxy": "0.116", "ecc_detection_coverage_proxy": "0.392", "residual_uncorrectable_risk_proxy": "0.130", "thermal_power_stress_proxy": "0.201", "data_integrity_guardband_score": "0.962", "decision_gate": "bounded_study_candidate", "evidence_state": "safe_for_lesson_figure_only", "next_safe_check": "keep_model_card_and_public_boundary_attached" }, { "case_id": "DRAMREL003-0002", "memory_context": "ddr5_server_rdimm", "context_label": "DDR5 server RDIMM study case", "context_note": "server memory makes RAS, scrub, ECC, and availability language visible", "retention_tail": "nominal_tail", "retention_tail_note": "baseline before weak-tail or variable-retention-time review", "temperature_class": "cool_45c_proxy", "access_pattern": "row_buffer_friendly_stream", "access_note": "mostly teaches refresh tax under benign locality", "refresh_policy": "baseline_periodic_refresh", "refresh_note": "baseline teaching case; not a standards claim", "protection_policy": "host_secded_guardband", "protection_note": "single-error correction does not prove multi-bit disturbance safety", "retention_stress_score": "0.132", "refresh_overhead_index": "0.192", "availability_latency_tax": "0.353", "activation_pressure_index": "0.248", "hammer_risk_proxy": "0.116", "ecc_detection_coverage_proxy": "0.619", "residual_uncorrectable_risk_proxy": "0.110", "thermal_power_stress_proxy": "0.201", "data_integrity_guardband_score": "0.994", "decision_gate": "bounded_study_candidate", "evidence_state": "safe_for_lesson_figure_only", "next_safe_check": "keep_model_card_and_public_boundary_attached" }, { "case_id": "DRAMREL003-0003", "memory_context": "ddr5_server_rdimm", "context_label": "DDR5 server RDIMM study case", "context_note": "server memory makes RAS, scrub, ECC, and availability language visible", "retention_tail": "nominal_tail", "retention_tail_note": "baseline before weak-tail or variable-retention-time review", "temperature_class": "cool_45c_proxy", "access_pattern": "row_buffer_friendly_stream", "access_note": "mostly teaches refresh tax under benign locality", "refresh_policy": "baseline_periodic_refresh", "refresh_note": "baseline teaching case; not a standards claim", "protection_policy": "scrubbed_strong_ecc_review", "protection_note": "stronger protection still needs workload, scrub interval, and evidence review", "retention_stress_score": "0.132", "refresh_overhead_index": "0.192", "availability_latency_tax": "0.403", "activation_pressure_index": "0.248", "hammer_risk_proxy": "0.116", "ecc_detection_coverage_proxy": "0.774", "residual_uncorrectable_risk_proxy": "0.095", "thermal_power_stress_proxy": "0.201", "data_integrity_guardband_score": "1.000", "decision_gate": "bounded_study_candidate", "evidence_state": "safe_for_lesson_figure_only", "next_safe_check": "keep_model_card_and_public_boundary_attached" }, { "case_id": "DRAMREL003-0004", "memory_context": "ddr5_server_rdimm", "context_label": "DDR5 server RDIMM study case", "context_note": "server memory makes RAS, scrub, ECC, and availability language visible", "retention_tail": "nominal_tail", "retention_tail_note": "baseline before weak-tail or variable-retention-time review", "temperature_class": "cool_45c_proxy", "access_pattern": "row_buffer_friendly_stream", "access_note": "mostly teaches refresh tax under benign locality", "refresh_policy": "temperature_compensated_refresh", "refresh_note": "refresh rate follows thermal stress rather than fixed intuition", "protection_policy": "no_ecc_study_only", "protection_note": "useful only for showing what protection is not covering", "retention_stress_score": "0.075", "refresh_overhead_index": "0.229", "availability_latency_tax": "0.326", "activation_pressure_index": "0.248", "hammer_risk_proxy": "0.100", "ecc_detection_coverage_proxy": "0.173", "residual_uncorrectable_risk_proxy": "0.119", "thermal_power_stress_proxy": "0.209", "data_integrity_guardband_score": "0.939", "decision_gate": "bounded_study_candidate", "evidence_state": "safe_for_lesson_figure_only", "next_safe_check": "keep_model_card_and_public_boundary_attached" }, { "case_id": "DRAMREL003-0005", "memory_context": "ddr5_server_rdimm", "context_label": "DDR5 server RDIMM study case", "context_note": "server memory makes RAS, scrub, ECC, and availability language visible", "retention_tail": "nominal_tail", "retention_tail_note": "baseline before weak-tail or variable-retention-time review", "temperature_class": "cool_45c_proxy", "access_pattern": "row_buffer_friendly_stream", "access_note": "mostly teaches refresh tax under benign locality", "refresh_policy": "temperature_compensated_refresh", "refresh_note": "refresh rate follows thermal stress rather than fixed intuition", "protection_policy": "on_die_ecc_visibility", "protection_note": "device-side correction visibility is not the same as end-to-end system proof", "retention_stress_score": "0.075", "refresh_overhead_index": "0.229", "availability_latency_tax": "0.346", "activation_pressure_index": "0.248", "hammer_risk_proxy": "0.100", "ecc_detection_coverage_proxy": "0.392", "residual_uncorrectable_risk_proxy": "0.102", "thermal_power_stress_proxy": "0.209", "data_integrity_guardband_score": "0.985", "decision_gate": "bounded_study_candidate", "evidence_state": "safe_for_lesson_figure_only", "next_safe_check": "keep_model_card_and_public_boundary_attached" }, { "case_id": "DRAMREL003-0006", "memory_context": "ddr5_server_rdimm", "context_label": "DDR5 server RDIMM study case", "context_note": "server memory makes RAS, scrub, ECC, and availability language visible", "retention_tail": "nominal_tail", "retention_tail_note": "baseline before weak-tail or variable-retention-time review", "temperature_class": "cool_45c_proxy", "access_pattern": "row_buffer_friendly_stream", "access_note": "mostly teaches refresh tax under benign locality", "refresh_policy": "temperature_compensated_refresh", "refresh_note": "refresh rate follows thermal stress rather than fixed intuition", "protection_policy": "host_secded_guardband", "protection_note": "single-error correction does not prove multi-bit disturbance safety", "retention_stress_score": "0.075", "refresh_overhead_index": "0.229", "availability_latency_tax": "0.376", "activation_pressure_index": "0.248", "hammer_risk_proxy": "0.100", "ecc_detection_coverage_proxy": "0.619", "residual_uncorrectable_risk_proxy": "0.085", "thermal_power_stress_proxy": "0.209", "data_integrity_guardband_score": "1.000", "decision_gate": "bounded_study_candidate", "evidence_state": "safe_for_lesson_figure_only", "next_safe_check": "keep_model_card_and_public_boundary_attached" }, { "case_id": "DRAMREL003-0007", "memory_context": "ddr5_server_rdimm", "context_label": "DDR5 server RDIMM study case", "context_note": "server memory makes RAS, scrub, ECC, and availability language visible", "retention_tail": "nominal_tail", "retention_tail_note": "baseline before weak-tail or variable-retention-time review", "temperature_class": "cool_45c_proxy", "access_pattern": "row_buffer_friendly_stream", "access_note": "mostly teaches refresh tax under benign locality", "refresh_policy": "temperature_compensated_refresh", "refresh_note": "refresh rate follows thermal stress rather than fixed intuition", "protection_policy": "scrubbed_strong_ecc_review", "protection_note": "stronger protection still needs workload, scrub interval, and evidence review", "retention_stress_score": "0.075", "refresh_overhead_index": "0.229", "availability_latency_tax": "0.426", "activation_pressure_index": "0.248", "hammer_risk_proxy": "0.100", "ecc_detection_coverage_proxy": "0.774", "residual_uncorrectable_risk_proxy": "0.074", "thermal_power_stress_proxy": "0.209", "data_integrity_guardband_score": "1.000", "decision_gate": "bounded_study_candidate", "evidence_state": "safe_for_lesson_figure_only", "next_safe_check": "keep_model_card_and_public_boundary_attached" }, { "case_id": "DRAMREL003-0008", "memory_context": "ddr5_server_rdimm", "context_label": "DDR5 server RDIMM study case", "context_note": "server memory makes RAS, scrub, ECC, and availability language visible", "retention_tail": "nominal_tail", "retention_tail_note": "baseline before weak-tail or variable-retention-time review", "temperature_class": "cool_45c_proxy", "access_pattern": "row_buffer_friendly_stream", "access_note": "mostly teaches refresh tax under benign locality", "refresh_policy": "fine_granularity_same_bank_proxy", "refresh_note": "teaches that where refresh lands can change availability cost", "protection_policy": "no_ecc_study_only", "protection_note": "useful only for showing what protection is not covering", "retention_stress_score": "0.056", "refresh_overhead_index": "0.166", "availability_latency_tax": "0.287", "activation_pressure_index": "0.248", "hammer_risk_proxy": "0.083", "ecc_detection_coverage_proxy": "0.173", "residual_uncorrectable_risk_proxy": "0.099", "thermal_power_stress_proxy": "0.195", "data_integrity_guardband_score": "0.966", "decision_gate": "bounded_study_candidate", "evidence_state": "safe_for_lesson_figure_only", "next_safe_check": "keep_model_card_and_public_boundary_attached" }, { "case_id": "DRAMREL003-0009", "memory_context": "ddr5_server_rdimm", "context_label": "DDR5 server RDIMM study case", "context_note": "server memory makes RAS, scrub, ECC, and availability language visible", "retention_tail": "nominal_tail", "retention_tail_note": "baseline before weak-tail or variable-retention-time review", "temperature_class": "cool_45c_proxy", "access_pattern": "row_buffer_friendly_stream", "access_note": "mostly teaches refresh tax under benign locality", "refresh_policy": "fine_granularity_same_bank_proxy", "refresh_note": "teaches that where refresh lands can change availability cost", "protection_policy": "on_die_ecc_visibility", "protection_note": "device-side correction visibility is not the same as end-to-end system proof", "retention_stress_score": "0.056", "refresh_overhead_index": "0.166", "availability_latency_tax": "0.307", "activation_pressure_index": "0.248", "hammer_risk_proxy": "0.083", "ecc_detection_coverage_proxy": "0.392", "residual_uncorrectable_risk_proxy": "0.085", "thermal_power_stress_proxy": "0.195", "data_integrity_guardband_score": "1.000", "decision_gate": "bounded_study_candidate", "evidence_state": "safe_for_lesson_figure_only", "next_safe_check": "keep_model_card_and_public_boundary_attached" } ], "public_boundary": [ "No RowHammer attack workflow, exploit code, reverse-engineering procedure, memory-controller firmware, BIOS setting, DIMM qualification, or trace upload is provided.", "No live DRAMsim3, Ramulator2, RowHammer tester, hardware memory controller, thermal solver, or server-side simulator runs.", "No JEDEC table, vendor datasheet row, internal RAS mechanism, proprietary TRR behavior, ECC implementation, product recommendation, reliability signoff, or security assurance is claimed.", "This is not a DIMM qualification, product release, system-security guarantee, or memory-controller design recommendation.", "No account, upload, payment, comment, newsletter signup, job/event workflow, public service intake, equipment control, ATE programming, or copied paid/licensed source content is enabled." ], "methods": [ "Generate a Cartesian synthetic sweep across memory context, retention-tail class, temperature, access pattern, refresh policy, and protection policy.", "Normalize public DRAM refresh, RAS, RowHammer, simulator, and ECC vocabulary into proxy scores for retention stress, refresh tax, activation pressure, residual risk, thermal pressure, and guardband.", "Apply decision gates that route the learner to retention-tail, refresh-tax, RowHammer mitigation, ECC/scrub, thermal-system, or bounded-lesson evidence before any claim is reused.", "Store CSV, typed JSON, model card, source notes, and public boundary together with no paid article body, copied paper figure, simulator code, DIMM data, or product table." ], "limits": [ "No live server DRAMsim3, Ramulator2, RowHammer tester, attack workflow, exploit code, reverse-engineering procedure, DIMM test recipe, BIOS setting, memory-controller programming, trace upload, or memory simulator is active.", "No JEDEC table, vendor datasheet row, proprietary RAS mechanism, internal TRR behavior, ECC implementation, product recommendation, DIMM qualification, security assurance, or reliability signoff is claimed.", "No account, upload, payment, comment, newsletter signup action, job/event workflow, public service intake, process recipe, equipment control, ATE programming, product release, or copied paid/licensed source content is enabled.", "Rows are normalized synthetic teaching proxies and require owned retention, temperature, activation, syndrome, scrub, workload, and thermal evidence before stronger engineering reuse." ], "csv": "/data/dram-refresh-rowhammer-ecc-guardband-replay-v85.csv", "model_card": "/data/dram-refresh-rowhammer-ecc-guardband-replay-model-card-v1.md" }