# SA-MEM-EMERGING-TAXONOMY-003 - Emerging Memory Placement And Reliability Map

Version: 2026-08-22-v86

## Purpose

This browser CSV replay compares SRAM, DRAM, HBM/3D DRAM, 3D NAND, eDRAM/MIMCAP, MRAM, FeFET/FeRAM, ReRAM, PCM, SCM/CXL memory, embedded NVM, and CIM-style memory as placement candidates. It teaches that an emerging memory claim must be read through placement target, integration context, workload, reliability evidence, and public boundary.

## Dataset

- Rows: 1728
- Memory technologies: 12
- Placement targets: 4
- Integration contexts: 4
- Workload contexts: 3
- Decision priorities: 3
- Live server runs: 0

## Method

1. Assign normalized teaching proxies for latency, density, endurance, retention, write-energy pressure, read-margin risk, process compatibility, integration risk, thermal/process risk, and evidence maturity.
2. Sweep technology, placement target, integration context, workload, and decision priority.
3. Compute a placement-fit score and route each row to a decision gate.
4. Mark every row as synthetic teaching evidence that needs measured replacement before stronger use.

## Public Boundary

- No live memory simulator, TCAD, SPICE, Ramulator, DRAMsim, compact-model calibration, or server-side solver is active.
- No vendor product ranking, benchmark table, memory-stack recommendation, foundry qualification, or reliability signoff is claimed.
- No paid article body, publisher figure, textbook table, course slide, code body, COMSOL file, PDK/model deck, standard-cell file, or proprietary memory data is copied.

## Replacement Evidence Needed

Real engineering reuse would need owned technology data, cell/array measurements, endurance and retention distributions, read-margin statistics, ECC/verify strategy, process-integration evidence, thermal maps, workload traces, packaging context, and product-owner review.