LITERATURE READING ROOM
SemiAgora studies from official links, public metadata, open documentation, and rights-reviewed repositories. It does not mirror papers, PDK files, tool archives, article bodies, images, or third-party source code.
TODAY'S STUDY DECISIONS
These are not copied into SemiAgora as source material. Each item is a study prompt, official link, or future simulation seed with a visible boundary.
Use as the official-source anchor for teaching why sparse metrology, drift, sensor health, uncertainty, and adaptive sampling must be shown together.
Use as the next public EDA/Layout bridge from report vocabulary into quantified delay and slack-risk proxies.
Use as a link-only prompt for process-control chains that connect lithography metrology to downstream etch and yield evidence.
Use as a coverage-gap prompt across process technology, lithography, advanced packaging, EDA, chiplets, HBM, photonics, and TCAD.
Study how DRC/LVS evidence can be packaged into a safe public training ladder.
Use as a link-first discovery queue for CFET, PIM droop, layout repair, lithography defect prediction, 3D-IC FA, chiplets, and SiC slicing.
Use as a source anchor for CFET integration-flow vocabulary and architecture tradeoff questions.
Use as a link-only prompt for bond/contact reliability vocabulary and test evidence boundaries.
Use as a link-only anchor for device-physics literacy around quantum-dot FinFET-like structures.
Use as a public source anchor for HBM/base-die partitioning vocabulary across controller placement, PHY, RAS, TSV, interposer, thermal, bandwidth, capacity, and yield tradeoffs.
Use as the source anchor for teaching why stacked n/p devices need contact, via, local-interconnect, parasitic, thermal, and integration review before PPAC claims.
Use as a link-only anchor for HPSI SiC, RF GaN epitaxy, and substrate thermal/RF vocabulary in the GaN-on-SiC HEMT chain.
Use as a link-only official source spine for the v84 browser CSV replay.
Use public links as a source spine for retention, refresh, RowHammer, ECC, simulator, and guardband vocabulary.
Use public links as a source spine for memory technology taxonomy, application placement, reliability, integration, and evidence vocabulary.
Use official public documentation as a source spine for STA report, cell mapping, drive strength, load, slew, cap, area, and timing repair vocabulary.
Use public source anchors for dynamic on-resistance, stress, recovery, trap memory, pulsed I-V, double-pulse, and reliability vocabulary.
Use public source anchors for APC, FDC, run-to-run control, EDA, VM uncertainty, dynamic sampling, and feedforward handoff vocabulary.
Use public source anchors for TCAD solver literacy, DOE sampling, response-surface modeling, surrogate uncertainty, extrapolation guards, and validation posture.
Use official public source anchors to compare architecture context, electrostatic control, contacts, variability, thermal, integration, metrology, and circuit handoff without declaring a universal winner.
Use official report vocabulary and the saved SA-LAY-007/008/009 fixtures to teach checkpoint alignment, cross-report contradictions, replacement slots, and owner review.
Teach how assumptions, characterization, STA, routed parasitics, physical verification, test structures, measurements, discrepancy, provenance, and uncertainty change claim maturity.
Teach why study design, representative part range, repeatability, operator/tool/interaction reproducibility, bias, linearity, stability, resolution, and uncertainty cannot be replaced by one pass/fail slogan.
STUDY TRACKS
A source becomes useful only when it teaches a question SemiAgora can answer with original explanation, precomputed data, and a limitation card.
Process
Process
Packaging / Metrology
EDA / Layout
Device
Memory / Device Reliability
EDA / Layout
Process / Metrology / Yield
EDA / Layout
Memory / HBM / Packaging
Device / Logic Scaling
Power / Device
EDA / Layout
Memory
Memory
EDA / Layout
Power Device
Process / Metrology / Yield
Device / TCAD / Modeling
Device / Advanced CMOS / DTCO
EDA / Layout / Timing / Power Integrity
EDA / Layout / Characterization / Measurement
Metrology / Yield / Measurement Systems
FOUNDATION SOURCE SPINE
Daily finds are fast. Foundation sources keep the site from becoming a news pile.
Shows the full course-packet model: syllabus, readings, lectures, assignments, exams, and reusable learning structure.
Use as the benchmark for lesson packets and self-checks; keep links official and verify license per course.
Separates tools, courses, data exploration, papers, teaching material, workshops, and community submissions.
Use as an IA benchmark for simulation-first browsing and future submission policy, without enabling submissions yet.
Frames measurement as a yield, quality, uncertainty, and standards problem across microelectronic materials, devices, circuits, and systems.
Use as the public spine for metrology/yield pages and source discipline.
Connects virtual metrology to drift/shift, sparse physical measurements, uncertainty quantification, adaptive sampling, and process-control cost.
Use as a source spine for virtual-metrology lessons; keep examples synthetic unless rights-clean measured data is explicitly reviewed.
Provides open RTL-to-GDS flow documentation, tool commands, routing, CTS, PDN, and parasitic-extraction context.
Use as official documentation links for layout/EDA cards, never as a copied manual.
Gives public documentation for design rules, layers, devices, LVS, PEX, and SRAM-related open-PDK context.
Use as official context while keeping PDK files and machine-specific paths out of public packages.
Frames chiplet, SiP, 3D integration, packaging challenges, and long-horizon technical needs.
Use as a roadmap source for packaging/test/reliability learning paths and capstone planning.
Gives fast visibility into new preprints, simulation frameworks, uncertainty models, device topics, and packaging research.
Use IDs and links only; public notes must be original and claims must be checked before promotion.
Shows reusable code, reproducibility patterns, licenses, and README structure.
Use metadata and links only until license, originality, dependencies, and restricted-file boundaries are checked.
Provides public vocabulary for HBM stack, optional base die, TSV/microbump connection, wide interface, channels, SiP, and interposer language.
Use as an HBM vocabulary anchor only; do not use it as a calibration, product ranking, or vendor performance claim.
Provides public vocabulary for CFET vertical n/p stacking, monolithic/sequential flows, PPAC, and source/drain contact-patterning challenges.
Use as the public device-scaling spine for CFET lessons; keep all rows synthetic until rights-cleared measured or extracted data exists.
Frames SiC and GaN as wide-bandgap power-electronics materials with voltage, temperature, switching-frequency, packaging, and reliability implications.
Use as a broad foundation link for wide-bandgap evidence vocabulary; do not copy PDF body, figures, device data, or application tables.
Official public documentation names the flow stages and report vocabulary needed to teach floorplan evidence without copying design collateral.
Anchor public-safe EDA report-literacy lessons and simulation seeds.
DRAM reliability study requires refresh, retention, activation pressure, ECC/scrub, and simulator vocabulary to stay connected.
Anchor public-safe DRAM guardband lessons and future local-build simulations.
Memory learners need to compare cell physics, hierarchy placement, integration burden, reliability evidence, and application fit without treating one technology as a universal replacement.
Anchor public-safe emerging-memory taxonomy lessons and future measured replacement slots.
A learner must connect cell delay, drive, input slew, output load, pin capacitance, area, setup/hold slack, and report stage before trusting a timing claim.
Anchor public-safe report-literacy lessons and future rights-clean replacement report packages.
A learner must connect stress class, recovery window, temperature, switching context, trap memory, current collapse, and measurement method before trusting a dynamic-Ron number.
Anchor public-safe dynamic-Ron report-literacy lessons and later owned-measurement replacement packets.
A learner must connect data quality, FDC state, VM uncertainty, sampling coverage, feedforward handoff, false-alarm risk, and role review before trusting process-control language.
Anchor public-safe APC/FDC decision-literacy lessons and later owned-data replacement packets.
A learner must keep mesh convergence, calibration anchors, DOE coverage, surrogate uncertainty, extrapolation risk, and physics constraints visible before trusting an optimization result.
Anchor public-safe TCAD optimization literacy lessons and later owned solver-deck replacement packets.
Architecture choice changes electrostatics, quantization, contacts, local RC, variability, heat, integration, metrology, and circuit evidence together.
Anchor public-safe architecture literacy and later owned compact-model, extraction, metrology, and circuit-correlation replacement packets.
Clock, route, extraction, activity, and power-grid reports can disagree because they refer to different checkpoints, corners, assumptions, or owners.
Anchor a public-safe cross-report handoff replay and later rights-cleared same-design replacement evidence.
A green flow, a reproducible report, a planned test structure, and an uncertainty-bounded owned measurement are different evidence states.
Anchor a public-safe evidence ladder while preserving author-claim, rights, provenance, and no-measurement boundaries.
A measurement-system review must identify study design, representative material, repeatability, reproducibility, reference effects, stability, resolution, uncertainty, and the claim being supported.
Anchor a public-safe synthetic replay while preserving no-raw-data, no-acceptance-threshold, no-disposition, and no-lot-release boundaries.
REVIEW BACKLOG
Technically relevant, but tied to proprietary-tool workflows and unclear reuse rights.
Strong education signal, but license metadata is missing or unclear.
Useful topic signal for oxide TFT optimization, but source quality and reuse rights need review before public display.
Thin-film photosensing signal; hold until dataset/source quality and license terms are reviewed.
PUBLICATION BOUNDARY