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DOMAIN BROWSER

Browse by job family.
Keep every claim bounded.

A public landing layer for navigating and deepening a comprehensive semiconductor site by job-family surface rather than by homepage accumulation.

browseDomain LanesdepthDeepen All TracksprocessRole ViewsprocessP-D-C ChainsobjectsSimulation AtlasnewEquipment FacilitiespublicSource Spine

NINE SEMICONDUCTOR SURFACES

The site can grow without becoming a pile.

Each lane names the role signal, the first question to ask, the live routes, the simulation objects already seeded, and the boundary that must stay visible.

Process module engineer / integration handoff

Process

What changed on the wafer, and what evidence proves it?

Live sims in lane: 45

Queued depth seeds: 8

Showing 4 of 57 route cards. Open the domain page for the complete lane.

Next: virtual metrology and defect pareto replay / ALD/CVD/PVD nonuniformity comparison / measured replacement data for contact Rc chain / measured replacement data for etch UQ replay / owned APC/FDC and feedforward replacement evidence / owned M3D process sequence, thermal-budget compatibility, cross-tier connection, structure/metrology, and extraction provenance / owned feature geometry, incident distributions, surface interaction evidence, profile metrology, convergence, uncertainty, and integration review for directional etch and sputter deposition / owned chamber-to-wafer ion, neutral, energy-angle, radial, wall-state, chemistry, uncertainty, and feature-profile bridge evidence for plasma etch or PECVD studies / owned gas identity and composition, physical source and wall-release terms, chamber and line geometry, pressure-dependent transport, wafer distribution, repeatability, uncertainty, and plasma-response evidence / owned material stack, gas and surface chemistry, ion and radical distributions, profile and rate metrology, endpoint evidence, damage evidence, uncertainty, model-to-measurement comparison, and accountable integration review / owned process, device, circuit, reliability, test, genealogy, yield, uncertainty, and accountable review evidence for cross-domain attribution / owned chemistry, material, geometry, equipment, endpoint, metrology, profile, residue, damage, uncertainty, and genealogy evidence for etch-family replacement / owned material, precursor, surface, chamber, bath, feature, film, interface, metrology, uncertainty, and genealogy evidence for deposition-family replacement / owned mask, substrate, resist, beam, thermal, surface, removal, equipment, metrology, uncertainty, and genealogy evidence for patterning-module replacement / owned sensor signals, measurands, calibration, sampling, equipment history, chamber state, inspection, uncertainty, genealogy, and approval evidence for sensor-control replacement / owned route and equipment records, facility measurements, utility meters, abatement evidence, operating-state events, resource and emissions accounting, allocation rules, uncertainty, validation, and approval evidence / owned material, interface, equipment, carrier, probe-card, tester, calibration, mapping, genealogy, coverage, reliability, qualification, acceptance, and disposition evidence

Boundary: no recipe / no tool setting / no facility credential / no APC programming or equipment-control workflow / no process recipe, temperature/time transfer, virtual-fabrication claim, PDK, foundry comparison, or tapeout readiness / no gas, pressure, power, bias, flow, time, length, energy, angle, sticking, sputter-yield, or recipe recommendation / no pressure, flow, chemistry, power, frequency, voltage, bias, temperature, time, energy, angle, rate, process window, or recipe recommendation / no physical pressure, flow, gas composition, pump speed, conductance, volume, timing, process window, recipe, or control action / no named material or gas recipe, physical pressure, power, bias, energy, flux, time, etch rate, selectivity, profile dimension, endpoint action, equipment command, process window, or qualification claim / no automatic causal attribution, equipment action, model calibration, circuit signoff, reliability qualification, product binning, wafer disposition, yield decision, or publication action / no automatic chemistry selection, recipe recommendation, equipment action, endpoint decision, process release, wafer disposition, yield claim, or publication action / no automatic material or precursor selection, recipe recommendation, equipment action, process release, wafer disposition, yield claim, or publication action / no automatic material selection, setting or recipe recommendation, equipment action, material acceptance, wafer disposition, process signoff, yield claim, or publication action / no automatic threshold, control-limit, maintenance, equipment, material-acceptance, wafer-disposition, yield, release, or publication action / no automatic dispatch, equipment command, utility or abatement setting, inventory certification, compliance, material-acceptance, wafer-disposition, release, or publication action / no automatic equipment or ATE action, setting or limit recommendation, acceptance, qualification, binning, disposition, release, or publication action

Device physics / TCAD / characterization

Device

How do charge, potential, materials, thermal path, and carriers become I-V, C-V, RF, or power-device evidence?

Live sims in lane: 17

Queued depth seeds: 11

Showing 4 of 48 route cards. Open the domain page for the complete lane.

Next: Vt flavor selection / subthreshold swing and DIBL / owned pulsed I-V dynamic Ron replacement evidence / owned architecture-comparison compact models, metrology, contact RC, and circuit correlation / owned TCAD calibration and surrogate replacement evidence / rights-cleared mode/FDTD convergence and calibrated optical replacement evidence / owned bias-tagged Touchstone replacement data with calibration, de-embedding, uncertainty, and broadband quality evidence / owned 2D CFET contact metrology, calibrated compact models, extracted-layout RC, circuit correlation, thermal/variation evidence, and accountable DTCO review / owned SNSPD spatial current/defect evidence, detector records, optical coupling, event and timing lineage, background separation, uncertainty, and mechanism review / owned oxide-semiconductor access-device, interface, contact, variability, compact-model, and measurement evidence for M3D SRAM handoff / owned gate- and temperature-resolved heterojunction I-V, contact/series de-embedding, sweep-history, uncertainty, and independently reproduced transport evidence for NDR mechanism discrimination / owned thermoelectric material/device provenance, physical transfer function, reference-junction characterization, drift, strain, cross-sensitivity, repeatability, uncertainty, and accountable review evidence / owned process, device, circuit, reliability, test, genealogy, yield, uncertainty, and accountable review evidence for cross-domain attribution

Boundary: model fidelity stated / no measured-silicon claim without data / no node ranking or product claim / no substrate supplier ranking or product recommendation / no dynamic-Ron qualification or product recommendation / no TCAD deck, solver, optimizer, calibrated silicon, or product claim / no architecture or node ranking, calibrated model claim, cost/yield claim, or product recommendation / no calibrated optical performance, material model, foundry process, or photonic product claim / no VNA control, IEEE 370 compliance, device ranking, matching recommendation, or RF signoff claim / no A2 feasibility claim, architecture ranking, proprietary PDK/model/extraction, live solver, or PPA signoff / no detector geometry, current, cryostat setting, fabrication recipe, calibrated performance prediction, design recommendation, product ranking, or qualification / no oxide-semiconductor material/device ranking, calibrated transport claim, source-derived model, or production recommendation / no source curve reuse, calibrated transport claim, mechanism proof from curve shape, material/device ranking, operating recommendation, circuit advantage, or production claim / no copied sensor result, physical coefficient, temperature recommendation, material/device ranking, fabrication recipe, medical use, calibration service, or signoff claim / no automatic causal attribution, equipment action, model calibration, circuit signoff, reliability qualification, product binning, wafer disposition, yield decision, or publication action

Analog / mixed-signal / circuit design

Circuit

How does a device-level curve become gain, delay, and oscillation?

Live sims in lane: 6

Queued depth seeds: 4

Showing 4 of 13 route cards. Open the domain page for the complete lane.

Next: differential pair gain and input range / comparator metastability / standard-cell sizing / STA path replay / owned process, device, circuit, reliability, test, genealogy, yield, uncertainty, and accountable review evidence for cross-domain attribution

Boundary: PDK condition stated / no final video until review gate clears / no automatic causal attribution, equipment action, model calibration, circuit signoff, reliability qualification, product binning, wafer disposition, yield decision, or publication action

SRAM / DRAM / memory test / architecture

Memory

How does memory preserve, sense, move, disturb, retain, protect, and place data across SRAM, DRAM, HBM, NAND, MRAM, FeFET, SCM, CIM, and hybrid memory systems?

Live sims in lane: 32

Queued depth seeds: 5

Showing 4 of 59 route cards. Open the domain page for the complete lane.

Next: SRAM column decoder and bank I/O handoff / compiler-style aspect ratio and words-per-row tradeoff / measured DRAM retention, syndrome, scrub, and thermal replacement data / measured replacement evidence for MRAM, FeFET, ReRAM, PCM, NAND, DRAM, HBM, and SCM placement claims / owned M3D SRAM topology/conditions, compact-model lineage, contacts, inter-tier connectivity, thermal budget, cell/subarray stability, timing, energy, variation, uncertainty, and review evidence / owned process, device, circuit, reliability, test, genealogy, yield, uncertainty, and accountable review evidence for cross-domain attribution

Boundary: pre-layout teaching results unless stated / protocol evidence is not analog timing / no copied SRAM topology, dimensions, source parasitics, node claim, architecture ranking, product comparison, or signoff / no automatic causal attribution, equipment action, model calibration, circuit signoff, reliability qualification, product binning, wafer disposition, yield decision, or publication action

Physical design / DRC / LVS / PEX / timing

EDA / Layout

How do layout markers, connectivity reports, parasitics, and timing evidence become a public-safe verification claim?

Live sims in lane: 10

Queued depth seeds: 4

Showing 4 of 26 route cards. Open the domain page for the complete lane.

Next: floorplan congestion and IR-drop replay after layout RC / SKY130 PV checkpoint replay with DRC/LVS/PEX/timing evidence ladder / GitHub Actions repro-check for rights-cleared OpenROAD/OpenLane reports / owned same-checkpoint CTS/STA, route/DRC, extracted-RC, and EM/IR replacement reports / rights-cleared same-design model, characterization, routed-report, test-structure, and owned measurement replacement package / reproduced ring-oscillator comparison with environment and measurement-uncertainty lineage

Boundary: no PDK redistribution / no signoff claim / no live EDA execution, design/report upload, ECO guidance, timing/PDN signoff, or tapeout claim / no repository mirroring, external numeric reuse, live flow, upload, signoff certification, fabrication service, measurement claim, or endorsement

Equipment engineer / facilities / EHS boundary

Equipment / Facilities

What tool or facility condition supports the process, and what is still not an operating instruction?

Live sims in lane: 9

Queued depth seeds: 4

Showing 4 of 36 route cards. Open the domain page for the complete lane.

Next: EHS vocabulary / abatement boundary / facility data dictionary / chamber/source-to-feature boundary evidence connecting owned plasma or vapor distributions to feature-scale transport without exposing equipment operation / owned source, matching, chamber geometry, pumping, gas delivery, wall history, diagnostics, maintenance context, safety, and accountable equipment review / owned gauges, MFCs, valves, pump and conductance curves, line and chamber geometry, wall history, leak and outgassing context, abatement and safety controls, calibration, uncertainty, and accountable review / owned source and bias architecture, chamber state, ion-energy and ion-current diagnostics, matching and power records, gas and vacuum evidence, wall history, endpoint signals, controls, calibration, uncertainty, safety governance, and accountable review / owned process, device, circuit, reliability, test, genealogy, yield, uncertainty, and accountable review evidence for cross-domain attribution / owned chemistry, material, geometry, equipment, endpoint, metrology, profile, residue, damage, uncertainty, and genealogy evidence for etch-family replacement / owned material, precursor, surface, chamber, bath, feature, film, interface, metrology, uncertainty, and genealogy evidence for deposition-family replacement / owned mask, substrate, resist, beam, thermal, surface, removal, equipment, metrology, uncertainty, and genealogy evidence for patterning-module replacement / owned sensor signals, measurands, calibration, sampling, equipment history, chamber state, inspection, uncertainty, genealogy, and approval evidence for sensor-control replacement / owned route and equipment records, facility measurements, utility meters, abatement evidence, operating-state events, resource and emissions accounting, allocation rules, uncertainty, validation, and approval evidence

Boundary: no facility workflow / no equipment control / no gas/chemical handling / no emergency procedure / no chamber model, equipment setpoint, facility operation, control action, vendor model, or named-tool parity claim / no chamber model, matching-network action, setpoint, alarm disposition, maintenance instruction, control action, vendor ranking, or named-tool parity claim / no hardware sizing, MFC/valve/pump/gas-panel/abatement command, alarm disposition, maintenance or clean instruction, safety procedure, supplier ranking, or named-tool parity claim / no RF, matching-network, gas-panel, MFC, pressure-control, valve, temperature, endpoint, maintenance, clean, safety, or wafer-disposition action / no automatic causal attribution, equipment action, model calibration, circuit signoff, reliability qualification, product binning, wafer disposition, yield decision, or publication action / no automatic chemistry selection, recipe recommendation, equipment action, endpoint decision, process release, wafer disposition, yield claim, or publication action / no automatic material or precursor selection, recipe recommendation, equipment action, process release, wafer disposition, yield claim, or publication action / no automatic material selection, setting or recipe recommendation, equipment action, material acceptance, wafer disposition, process signoff, yield claim, or publication action / no automatic threshold, control-limit, maintenance, equipment, material-acceptance, wafer-disposition, yield, release, or publication action / no automatic dispatch, equipment command, utility or abatement setting, inventory certification, compliance, material-acceptance, wafer-disposition, release, or publication action

Metrology / process control / yield learning

Metrology / Yield

Is the measurement fit for the claim?

Live sims in lane: 16

Queued depth seeds: 5

Showing 4 of 56 route cards. Open the domain page for the complete lane.

Next: defect pareto / split-lot decision tree / owned APC/FDC and feedforward replacement evidence / defect pareto and wafer-map decision replay / split-lot decision tree with owned uncertainty evidence / owned raw Gauge R&R observations and reviewed analysis replacement packet / traceable single-photon flux, coupling, background, timing, repeatability, drift, and uncertainty replacement evidence for SNSPD measurands / owned signed I-V sweeps with direction, rate, dwell, repeatability, drift, contact configuration, instrument lineage, resolution, and uncertainty for NDR classification / owned measurand definition, comparison method, reference standards, instrument lineage, repeatability, drift, hysteresis, cross-sensitivity, uncertainty budget, and traceability review for thermoelectric sensing / owned initial/final profile geometry, CD and depth definitions, sampling plan, Gauge R&R, uncertainty, contradiction review, and profile replacement evidence / owned plasma diagnostics, wafer-facing flux/energy-angle measurements, radial sampling, repeatability, uncertainty, profile correlation, and replacement-evidence review / owned pressure and flow measurands, instruments, calibration and traceability, transient sampling, repeatability, chamber and wafer correlation, uncertainty, and replacement-evidence review / owned ion, radical, film, mask, profile, CD, depth, sidewall, damage, charging, endpoint, repeatability, traceability, uncertainty, and model-discrepancy evidence / owned process, device, circuit, reliability, test, genealogy, yield, uncertainty, and accountable review evidence for cross-domain attribution / owned chemistry, material, geometry, equipment, endpoint, metrology, profile, residue, damage, uncertainty, and genealogy evidence for etch-family replacement / owned material, precursor, surface, chamber, bath, feature, film, interface, metrology, uncertainty, and genealogy evidence for deposition-family replacement / owned mask, substrate, resist, beam, thermal, surface, removal, equipment, metrology, uncertainty, and genealogy evidence for patterning-module replacement / owned sensor signals, measurands, calibration, sampling, equipment history, chamber state, inspection, uncertainty, genealogy, and approval evidence for sensor-control replacement / owned route and equipment records, facility measurements, utility meters, abatement evidence, operating-state events, resource and emissions accounting, allocation rules, uncertainty, validation, and approval evidence / owned material, interface, equipment, carrier, probe-card, tester, calibration, mapping, genealogy, coverage, reliability, qualification, acceptance, and disposition evidence

Boundary: uncertainty visible / no private wafer data / no model-training service / no lot-release policy / no APC programming or equipment-control workflow / no universal Gauge R&R acceptance band, customer specification, quality disposition, lot release, live ANOVA, or metrology-system control / no instrument-control procedure, copied calibration data, calibrated efficiency claim, dark-count qualification, or product comparison / no single-point NDR claim, rectification-to-NDR substitution, unreported sweep history, copied trace, or uncertainty-free mechanism attribution / no ITS-90 realization claim, NIST/BIPM function or table reuse, calibration certificate, service representation, uncertainty-free temperature claim, or clinical interpretation / no measured profile row, SEM/TEM pixel, qualified metrology result, lot disposition, or process signoff / no measured plasma or wafer row, calibrated instrument output, physical uniformity percentage, lot disposition, qualification, or signoff / no measured pressure or flow row, calibration coefficient, physical residence time, lot disposition, qualification, predictive-accuracy, or signoff claim / no measured plasma or wafer row, calibration coefficient, physical rate or dimension, endpoint threshold, lot disposition, predictive-accuracy, production-fitness, or signoff claim / no automatic causal attribution, equipment action, model calibration, circuit signoff, reliability qualification, product binning, wafer disposition, yield decision, or publication action / no automatic chemistry selection, recipe recommendation, equipment action, endpoint decision, process release, wafer disposition, yield claim, or publication action / no automatic material or precursor selection, recipe recommendation, equipment action, process release, wafer disposition, yield claim, or publication action / no automatic material selection, setting or recipe recommendation, equipment action, material acceptance, wafer disposition, process signoff, yield claim, or publication action / no automatic threshold, control-limit, maintenance, equipment, material-acceptance, wafer-disposition, yield, release, or publication action / no automatic dispatch, equipment command, utility or abatement setting, inventory certification, compliance, material-acceptance, wafer-disposition, release, or publication action / no automatic equipment or ATE action, setting or limit recommendation, acceptance, qualification, binning, disposition, release, or publication action

Package / test / reliability / FA

Packaging / Test / Reliability

What evidence remains after the die is fabricated, bonded, packaged, screened, and stressed?

Live sims in lane: 6

Queued depth seeds: 5

Showing 4 of 14 route cards. Open the domain page for the complete lane.

Next: failure-analysis ladder / board-level reliability vocabulary / final-test evidence / hybrid bonding reliability evidence / owned process, device, circuit, reliability, test, genealogy, yield, uncertainty, and accountable review evidence for cross-domain attribution / owned material, interface, equipment, carrier, probe-card, tester, calibration, mapping, genealogy, coverage, reliability, qualification, acceptance, and disposition evidence

Boundary: no ATE programming / no qualification signoff / no product release / no automatic causal attribution, equipment action, model calibration, circuit signoff, reliability qualification, product binning, wafer disposition, yield decision, or publication action / no automatic equipment or ATE action, setting or limit recommendation, acceptance, qualification, binning, disposition, release, or publication action

DEEPEN ALL TRACKS

Every lane now has a four-layer roadmap.

A static, evidence-first plan for deepening every semiconductor domain without enabling live execution or transactional workflows.

Process

Process depth connects unit operation, mechanism, inline metric, device parameter, circuit timing, memory margin, and yield consequence.

  • small-data virtual metrology replay
  • defect pareto and inline inspection
  • ALD/CVD/PVD film nonuniformity comparison
Open depth plan ->
Device

Device depth turns charge, potential, material stack, and geometry into extractable electrical curves.

  • Vt flavor selection
  • subthreshold swing and DIBL
  • owned pulsed I-V dynamic Ron replacement evidence
Open depth plan ->
Circuit

Circuit depth links device curves to bias, gain, delay, noise, feedback, and variation.

  • differential pair gain and input range
  • comparator metastability
  • standard-cell sizing
Open depth plan ->
Memory

Memory depth now spans SRAM cell/peripheral/I/O, DRAM/HBM locality, HBM/base-die partitioning, DRAM 1T1C sensing, retention, refresh, RowHammer, ECC/scrub guardbands, NAND threshold margin, MRAM switching/read/retention, FeFET/FeRAM, PCM, ReRAM, CIM, SCM, eDRAM/MIMCAP, 3D memory, and hierarchy placement while keeping device, cell, peripheral, controller, package, system, reliability, and evidence layers separate.

  • SRAM column decoder and bank I/O handoff
  • compiler-style aspect ratio and words-per-row tradeoff
  • measured DRAM retention, RowHammer, ECC, and scrub replacement data
Open depth plan ->
Digital / Verification

Digital depth makes cycle-level contracts, waveform evidence, assertions, timing assumptions, and fault coverage explicit.

  • FSM assertion replay
  • CDC synchronizer vocabulary
  • BIST transition and coupling fault coverage
Open depth plan ->
EDA / Layout

EDA and layout depth converts geometry into parasitics, constraints, violations, timing, and power integrity without redistributing restricted assets.

  • GitHub Actions repro-check for rights-cleared OpenROAD/OpenLane reports
  • rights-cleared real-tool PV report replacement package
  • owned rights-cleared same-checkpoint CTS, route, extraction, and power-integrity replacement package
Open depth plan ->
Equipment / Facilities

Equipment and facilities depth teaches state, availability, environment, utilities, and EHS vocabulary while avoiding operating instructions.

  • leak-rate and pumpdown vocabulary
  • cleanroom recovery excursion
  • OEE and RAM decomposition
Open depth plan ->
Metrology / Yield

Metrology and yield depth decides whether evidence is fit for a claim before the claim moves into process, device, or product language.

  • defect pareto and wafer map
  • split-lot DOE decision
  • yield learning curve
Open depth plan ->
Packaging / Test / Reliability

Packaging, test, and reliability depth follows evidence after wafer fabrication into interconnect, heat, hybrid bonding, screening, stress, and failure analysis.

  • board-level parasitic and thermal interaction
  • final-test guardband
  • HTOL and thermal-cycle reading
Open depth plan ->

SOURCE SPINE

Public anchors, not authority laundering.

The source links anchor vocabulary and scope. They do not turn SemiAgora teaching replays into certified measurements, process recipes, facility procedures, or signoff results.

source

ISO 14644-1 cleanroom particle classification

Official ISO page anchoring cleanroom air-cleanliness vocabulary by airborne-particle concentration.

Open source ->
source

SEMI E10 equipment RAM and utilization

Official SEMI page anchoring equipment reliability, availability, maintainability, and utilization language.

Open source ->
source

NIST CHIPS materials and manufacturing equipment facilities

Official NIST page defining semiconductor materials and manufacturing-equipment facilities for public program vocabulary.

Open source ->
source

NIST CHIPS research and development programs

Official NIST page anchoring semiconductor metrology, standards, and precision-equipment calibration context.

Open source ->
source

NIST metrology and process-control uncertainty

Anchors measurement uncertainty and process-control evidence boundaries.

Open source ->
source

TSMC design-technology co-optimization

Anchors process, device, and design co-optimization vocabulary.

Open source ->
source

imec contact resistance challenge

Anchors contact resistance as a scaling limiter that affects downstream electrical behavior.

Open source ->
source

UV ozone pretreatment for ALD nucleation

Anchors surface pretreatment and nucleation vocabulary for future chain replacement data.

Open source ->
source

OpenROAD Flow Scripts GitHub

Official ORFS repository anchoring RTL-to-GDS flow-stage vocabulary and public-flow boundaries.

Open source ->
source

OpenROAD Flow Scripts tutorial

Official tutorial anchoring synthesis, floorplan, placement, CTS, routing, and result-review sequence.

Open source ->
source

OpenLane 2 documentation

Official documentation anchoring configurable open digital-ASIC flow vocabulary.

Open source ->
source

OpenLane timing closure documentation

Official timing-closure page anchoring setup/hold, path, slack, and STA interpretation language.

Open source ->
complete registry

777 public anchors remain searchable.

This overview shows 12 high-signal anchors. The complete registry preserves every source link and evidence boundary.

Open full source registry ->

MVP BOUNDARY

Useful now, still safely static.

The domain browser is deliberately a routing and evidence surface. It does not enable transactional or facility-sensitive workflows.

allowed

Evidence-centered browsing

Static domain navigation / Lesson, lab, simulation, evidence, and resource routing / Precomputed educational data / Public source anchors / Evidence-needs backlog / All-domain deepening roadmap

blocked

No risky workflows

No live server process or SPICE execution / No accounts, uploads, payments, comments, newsletter signup, job or event submissions / No facility workflow, equipment control, recipe workflow, endpoint control, ATE programming, qualification signoff, or product release