92 injectionsCasesUNKNOWNInspect metric contract
13 / 13 correctedSingle-bitUNKNOWNInspect metric contract
78 / 78 detectedDouble-bitUNKNOWNInspect metric contract
SIMULATION / SRAM_ECC_SECDED_001
SRAM SECDED ECC fault replay
SECDED ECC
Replay exhaustive one- and two-bit codeword fault injection for an 8-bit SECDED memory word.
EXPLORE
Start with the observable.
Use this page when the simulation is the primary artifact. The linked lesson explains the concept; the linked lab keeps the visual replay surface available.
- Select a single-bit injection and confirm the decoded payload is restored.
- Select a double-bit injection and confirm correction is withheld.
- Use flags and decoded data together when discussing safe memory returns.
RUN CARD
Conditions before conclusions.
The page replays saved ECC injection evidence and does not run user HDL.
Primary knobs
- Payload width: 8 bits
- Codeword width: 13 bits
- Faults: every one-bit and two-bit codeword location
- Checks: correction and double-error detection
Saved outputs
- decoded data
- corrected flag
- double-error flag
- event table
EXPORT
Download the public artifacts.
These exports are the supported public files for review. PDK files and restricted third-party material are not redistributed.
Dataset JSON
/data/secded-ecc8-web-v1.json
Open file ->ECC RTL
/data/secded_ecc8.sv
Open file ->Testbench
/data/secded_ecc8_tb.sv
Open file ->Waveform VCD
/data/secded_ecc8.vcd
Open file ->Package script
/data/package_secded_ecc.py
Open file ->METHODS
How the number was made.
Methods are written for citation discipline: the extraction rule matters as much as the plotted value.
Encode one fixed 8-bit payload into a 13-bit SECDED codeword.
Keep this method attached when reusing the figure or metric.
Inject every single-bit and double-bit codeword location.
Keep this method attached when reusing the figure or metric.
Classify correction and detection outcomes separately.
Keep this method attached when reusing the figure or metric.
LIMITS
What this page does not claim.
The MVP is useful because the limits are visible. These statements prevent a teaching simulation from being cited as silicon evidence.
One fixed payload and digital bit flips only; no analog cell failures, timing faults, or soft-error-rate model is included.
Carry this boundary into any derivative note, paper draft, or slide.
SECDED corrects single-bit errors and detects double-bit errors; it does not safely correct every multi-bit event.
Carry this boundary into any derivative note, paper draft, or slide.
The evidence is educational RTL behavior, not a memory-system reliability guarantee.
Carry this boundary into any derivative note, paper draft, or slide.
EVIDENCE
Trace the claim back to artifacts.
The evidence route remains the catalog-level browser; this page is the simulation-level reading card.
The dataset records 92 injection events with zero verification failures.
SRAM_ECC_SECDED_001
All single-bit cases restore the original payload.
SRAM_ECC_SECDED_001
All double-bit cases are detected and withheld as uncorrectable.
SRAM_ECC_SECDED_001
Public execution boundary
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