240 totalTrace eventsUNKNOWNInspect metric contract
80 accessesPer scenarioUNKNOWNInspect metric contract
0 / 2 / 3MismatchesUNKNOWNInspect metric contract
SIMULATION / SRAM_BIST_MARCH_CMINUS_001
March C- SRAM BIST fault replay
March C- BIST
Replay 80-access March C- traces for no-fault, stuck-at-0, and stuck-at-1 SRAM scenarios.
EXPLORE
Start with the observable.
Use this page when the simulation is the primary artifact. The linked lesson explains the concept; the linked lab keeps the visual replay surface available.
- Compare the no-fault trace with stuck-at-0 and stuck-at-1 scenarios.
- Find the first mismatch cycle before reading the final detection flag.
- Use March C- to separate deterministic memory test coverage from ECC recovery.
RUN CARD
Conditions before conclusions.
The page replays saved BIST traces. It does not synthesize or execute arbitrary user HDL.
Primary knobs
- Array model: 8 words x 8 bits
- March algorithm: March C-
- Faults: none, stuck-at-0, stuck-at-1
- Accesses: 10N for N memory words
Saved outputs
- cycle trace
- expected versus observed data
- mismatch count
- detected flag
EXPORT
Download the public artifacts.
These exports are the supported public files for review. PDK files and restricted third-party material are not redistributed.
Dataset JSON
/data/march-cminus-bist-web-v1.json
Open file ->BIST RTL
/data/march_cminus_bist.sv
Open file ->Testbench
/data/march_cminus_bist_tb.sv
Open file ->Waveform VCD
/data/march_cminus_bist.vcd
Open file ->Package script
/data/package_march_cminus.py
Open file ->METHODS
How the number was made.
Methods are written for citation discipline: the extraction rule matters as much as the plotted value.
Execute ascending and descending March elements against the saved memory model.
Keep this method attached when reusing the figure or metric.
Compare expected data against observed read data at every check.
Keep this method attached when reusing the figure or metric.
Report mismatch count and detection separately for each scenario.
Keep this method attached when reusing the figure or metric.
LIMITS
What this page does not claim.
The MVP is useful because the limits are visible. These statements prevent a teaching simulation from being cited as silicon evidence.
Only a simple stuck-at fault model is included; transition, coupling, address decoder, retention, and analog faults are not covered.
Carry this boundary into any derivative note, paper draft, or slide.
The evidence proves the teaching RTL behavior, not manufacturing test coverage for a production macro.
Carry this boundary into any derivative note, paper draft, or slide.
No ATPG, scan insertion, MBIST controller integration, or repair flow is included.
Carry this boundary into any derivative note, paper draft, or slide.
EVIDENCE
Trace the claim back to artifacts.
The evidence route remains the catalog-level browser; this page is the simulation-level reading card.
Each scenario preserves 80 trace events.
SRAM_BIST_MARCH_CMINUS_001
The dataset records no-fault pass, SA0 detected, and SA1 detected outcomes.
SRAM_BIST_MARCH_CMINUS_001
RTL, testbench, VCD, and package script are downloadable.
SRAM_BIST_MARCH_CMINUS_001
Public execution boundary
No server-side live ngspice execution, uploads, accounts, payments, comments, newsletter signup, or job/event submissions are active on this page.