23.689Lowest EDP indexUNKNOWNInspect metric contract
1.2 V / -20 CBest caseUNKNOWNInspect metric contract
20 casesSweep rowsUNKNOWNInspect metric contract
SIMULATION / SA-DIG-001-FO4-TIMING-001
FO4 delay and energy scaling
FO4 Timing
Replay VDD and temperature to connect standard-cell delay, switching energy, leakage, and an EDP-style index.
EXPLORE
Start with the observable.
Use this page when the simulation is the primary artifact. The linked lesson explains the concept; the linked lab keeps the visual replay surface available.
- Use FO4 as a bridge from inverter intuition to standard-cell timing.
- Read delay, energy, and leakage together before optimizing only VDD.
- Treat this as a timing vocabulary card before Liberty, STA, and OpenROAD artifacts.
RUN CARD
Conditions before conclusions.
This page replays saved FO4 data and does not run SPICE, Liberty characterization, synthesis, or STA.
Primary knobs
- Supply voltage
- Temperature
- Threshold proxy
Saved outputs
- FO4 delay
- Switching energy
- Leakage index
- EDP index
EXPORT
Download the public artifacts.
These exports are the supported public files for review. PDK files and restricted third-party material are not redistributed.
Dataset JSON
/data/fo4-delay-energy-scaling-web-v1.json
Open file ->Dataset CSV
/data/fo4-delay-energy-scaling-v64.csv
Open file ->v64 deep simulation summary CSV
/data/v64-deep-simulations-summary.csv
Open file ->v64 deep model script
/data/v64_deep_semiconductor_sims.mjs
Open file ->v64 deep model card
/data/v64-deep-simulations-model-card.md
Open file ->METHODS
How the number was made.
Methods are written for citation discipline: the extraction rule matters as much as the plotted value.
Delay scales with VDD, threshold proxy, and temperature-dependent mobility.
Keep this method attached when reusing the figure or metric.
Switching energy follows a normalized C VDD squared rule.
Keep this method attached when reusing the figure or metric.
The EDP index ranks delay-energy tradeoffs while leakage remains visible as a separate output.
Keep this method attached when reusing the figure or metric.
LIMITS
What this page does not claim.
The MVP is useful because the limits are visible. These statements prevent a teaching simulation from being cited as silicon evidence.
No PDK, Liberty file, parasitics, clock tree, STA path, or silicon ring-oscillator measurement is included.
Carry this boundary into any derivative note, paper draft, or slide.
No timing signoff or cell-library recommendation is made.
Carry this boundary into any derivative note, paper draft, or slide.
Use characterized cells and OpenROAD/STA artifacts before publishable timing claims.
Carry this boundary into any derivative note, paper draft, or slide.
EVIDENCE
Trace the claim back to artifacts.
The evidence route remains the catalog-level browser; this page is the simulation-level reading card.
v64 deep results store every VDD, temperature, delay, energy, leakage, and EDP row.
SA-DIG-001-FO4-TIMING-001
CSV export preserves the timing sweep.
SA-DIG-001-FO4-TIMING-001
OpenROAD and Yosys stay source anchors for future artifact-based timing lessons.
SA-DIG-001-FO4-TIMING-001
Source spine
These links anchor the public teaching model. They do not convert the replay into a qualified process recipe or signoff result.
Public execution boundary
No server-side live ngspice execution, uploads, accounts, payments, comments, newsletter signup, or job/event submissions are active on this page.