128.1484Highest PPA scoreUNKNOWNInspect metric contract
1 fins / Lg 10 nm / SVTBest caseUNKNOWNInspect metric contract
24 casesSweep rowsUNKNOWNInspect metric contract
SIMULATION / SA-DEV-001-FINFET-FINCOUNT-PPA-001
FinFET fin count versus PPA
FinFET PPA
Replay fin count, gate length, and Vt flavor to compare drive current, capacitance, leakage, delay index, and PPA score.
EXPLORE
Start with the observable.
Use this page when the simulation is the primary artifact. The linked lesson explains the concept; the linked lab keeps the visual replay surface available.
- Add fins only after reading drive, capacitance, and leakage together.
- Separate Vt flavor from geometry so speed and standby current do not blur.
- Use PPA score as a bridge to ring oscillator and standard-cell consequences.
RUN CARD
Conditions before conclusions.
This page replays saved FinFET data and does not run TCAD, compact models, PDK decks, or foundry design rules.
Primary knobs
- Fin count
- Gate length
- Vt flavor
Saved outputs
- Drive current proxy
- Gate capacitance
- Leakage
- PPA score
EXPORT
Download the public artifacts.
These exports are the supported public files for review. PDK files and restricted third-party material are not redistributed.
Dataset JSON
/data/finfet-fin-count-ppa-web-v1.json
Open file ->Dataset CSV
/data/finfet-fin-count-ppa-v64.csv
Open file ->v64 deep simulation summary CSV
/data/v64-deep-simulations-summary.csv
Open file ->v64 deep model script
/data/v64_deep_semiconductor_sims.mjs
Open file ->v64 deep model card
/data/v64-deep-simulations-model-card.md
Open file ->METHODS
How the number was made.
Methods are written for citation discipline: the extraction rule matters as much as the plotted value.
Drive current scales with fin count, Vt flavor, and a normalized gate-length factor.
Keep this method attached when reusing the figure or metric.
Gate capacitance scales with fin count and gate length.
Keep this method attached when reusing the figure or metric.
PPA score divides drive by capacitance and leakage penalty.
Keep this method attached when reusing the figure or metric.
LIMITS
What this page does not claim.
The MVP is useful because the limits are visible. These statements prevent a teaching simulation from being cited as silicon evidence.
No calibrated FinFET geometry, source/drain resistance, self-heating, variability, compact model, or measured silicon is included.
Carry this boundary into any derivative note, paper draft, or slide.
No process-node, foundry, or design-rule recommendation is made.
Carry this boundary into any derivative note, paper draft, or slide.
Real device work needs calibrated TCAD, compact models, layout rules, and measured electrical data.
Carry this boundary into any derivative note, paper draft, or slide.
EVIDENCE
Trace the claim back to artifacts.
The evidence route remains the catalog-level browser; this page is the simulation-level reading card.
v64 deep results store every fin count, gate length, Vt flavor, drive, capacitance, leakage, and score row.
SA-DEV-001-FINFET-FINCOUNT-PPA-001
CSV export preserves the PPA comparison table.
SA-DEV-001-FINFET-FINCOUNT-PPA-001
The advanced-device lesson links this card to GAA and stress-engineering cards.
SA-DEV-001-FINFET-FINCOUNT-PPA-001
Source spine
These links anchor the public teaching model. They do not convert the replay into a qualified process recipe or signoff result.
Public execution boundary
No server-side live ngspice execution, uploads, accounts, payments, comments, newsletter signup, or job/event submissions are active on this page.